From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by ml01.01.org (Postfix) with ESMTP id C696E1A1DF8 for ; Tue, 2 Aug 2016 08:20:21 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 02 Aug 2016 08:20:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,461,1464678000"; d="scan'208";a="149410970" Received: from orsmsx108.amr.corp.intel.com ([10.22.240.6]) by fmsmga004.fm.intel.com with ESMTP; 02 Aug 2016 08:20:21 -0700 Received: from orsmsx113.amr.corp.intel.com ([169.254.9.118]) by ORSMSX108.amr.corp.intel.com ([169.254.2.61]) with mapi id 14.03.0248.002; Tue, 2 Aug 2016 08:20:20 -0700 From: "Mudusuru, Giri P" To: "Fan, Jeff" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" , "Tian, Feng" , Laszlo Ersek Thread-Topic: [Patch v5 02/48] UefiCpuPkg/MpInitLib: Add microcode definitions defined in IA32 SDM Thread-Index: AQHR7JxEi8TXe0V4LUet5rBSbwxm3KA1yXmg Date: Tue, 2 Aug 2016 15:20:20 +0000 Message-ID: <4666AEFED60F8E4198B42BB01DCEABDF76E9D2D0@ORSMSX113.amr.corp.intel.com> References: <1470128388-17960-1-git-send-email-jeff.fan@intel.com> <1470128388-17960-3-git-send-email-jeff.fan@intel.com> In-Reply-To: <1470128388-17960-3-git-send-email-jeff.fan@intel.com> Accept-Language: en-US, hi-IN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Subject: Re: [Patch v5 02/48] UefiCpuPkg/MpInitLib: Add microcode definitions defined in IA32 SDM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Aug 2016 15:20:21 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Giri P Mudusuru =20 > -----Original Message----- > From: Fan, Jeff > Sent: Tuesday, August 2, 2016 1:59 AM > To: edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Tian, Feng > ; Mudusuru, Giri P ; Lasz= lo > Ersek > Subject: [Patch v5 02/48] UefiCpuPkg/MpInitLib: Add microcode definitions > defined in IA32 SDM >=20 > Add microcode definitions defined in Intel(R) 64 and IA-32 Architectures > Software Developer's Manual Volume 3A, Section 9.11. >=20 > v4: > 1. ProcessorSignature type changed to > CPU_MICROCODE_PROCESSOR_SIGNATURE > 2. Add pack(1) for structure CPU_MICROCODE_HEADER and > CPU_MICROCODE_EXTENDED_TABLE. > v3: > 1. Update SDM date to June, 2016 > 2. Mention BCD format in CPU_MICROCODE_DATE > 3. Rename ProcessorChecksum to Checksum to match SDM. >=20 > Cc: Michael Kinney > Cc: Feng Tian > Cc: Giri P Mudusuru > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jeff Fan > Reviewed-by: Laszlo Ersek > --- > UefiCpuPkg/Include/Register/Microcode.h | 200 > ++++++++++++++++++++++++++++++++ > 1 file changed, 200 insertions(+) > create mode 100644 UefiCpuPkg/Include/Register/Microcode.h >=20 > diff --git a/UefiCpuPkg/Include/Register/Microcode.h > b/UefiCpuPkg/Include/Register/Microcode.h > new file mode 100644 > index 0000000..94529a1 > --- /dev/null > +++ b/UefiCpuPkg/Include/Register/Microcode.h > @@ -0,0 +1,200 @@ > +/** @file > + Microcode Definitions. > + > + Microcode Definitions based on contents of the > + Intel(R) 64 and IA-32 Architectures Software Developer's Manual > + Volume 3A, Section 9.11 Microcode Definitions > + > + Copyright (c) 2016, Intel Corporation. All rights reserved.
> + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the = BSD > License > + which accompanies this distribution. The full text of the license may= be found > at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > + @par Specification Reference: > + Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volum= e 3A, > + June 2016, Chapter 9 Processor Management and Initialization, Section = 9-11. > + > +**/ > + > +#ifndef __MICROCODE_H__ > +#define __MICROCODE_H__ > + > +/// > +/// CPU Microcode Date in BCD format > +/// > +typedef union { > + struct { > + UINT32 Year:16; > + UINT32 Day:8; > + UINT32 Month:8; > + } Bits; > + UINT32 Uint32; > +} CPU_MICROCODE_DATE; > + > +/// > +/// CPU Microcode Processor Signature format > +/// > +typedef union { > + struct { > + UINT32 Stepping:4; > + UINT32 Model:4; > + UINT32 Family:4; > + UINT32 Type:2; > + UINT32 Reserved1:2; > + UINT32 ExtendedModel:4; > + UINT32 ExtendedFamily:8; > + UINT32 Reserved2:4; > + } Bits; > + UINT32 Uint32; > +} CPU_MICROCODE_PROCESSOR_SIGNATURE; > + > +#pragma pack (1) > + > +/// > +/// Microcode Update Format definition > +/// > +typedef struct { > + /// > + /// Version number of the update header > + /// > + UINT32 HeaderVersion; > + /// > + /// Unique version number for the update, the basis for the update > + /// signature provided by the processor to indicate the current update > + /// functioning within the processor. Used by the BIOS to authenticate > + /// the update and verify that the processor loads successfully. The > + /// value in this field cannot be used for processor stepping identifi= cation > + /// alone. This is a signed 32-bit number. > + /// > + UINT32 UpdateRevision; > + /// > + /// Date of the update creation in binary format: mmddyyyy (e.g. > + /// 07/18/98 is 07181998H). > + /// > + CPU_MICROCODE_DATE Date; > + /// > + /// Extended family, extended model, type, family, model, and stepping > + /// of processor that requires this particular update revision (e.g., > + /// 00000650H). Each microcode update is designed specifically for a > + /// given extended family, extended model, type, family, model, and > + /// stepping of the processor. > + /// The BIOS uses the processor signature field in conjunction with th= e > + /// CPUID instruction to determine whether or not an update is > + /// appropriate to load on a processor. The information encoded within > + /// this field exactly corresponds to the bit representations returned= by > + /// the CPUID instruction. > + /// > + CPU_MICROCODE_PROCESSOR_SIGNATURE ProcessorSignature; > + /// > + /// Checksum of Update Data and Header. Used to verify the integrity o= f > + /// the update header and data. Checksum is correct when the > + /// summation of all the DWORDs (including the extended Processor > + /// Signature Table) that comprise the microcode update result in > + /// 00000000H. > + /// > + UINT32 Checksum; > + /// > + /// Version number of the loader program needed to correctly load this > + /// update. The initial version is 00000001H > + /// > + UINT32 LoaderRevision; > + /// > + /// Platform type information is encoded in the lower 8 bits of this 4= - > + /// byte field. Each bit represents a particular platform type for a g= iven > + /// CPUID. The BIOS uses the processor flags field in conjunction with > + /// the platform Id bits in MSR (17H) to determine whether or not an > + /// update is appropriate to load on a processor. Multiple bits may be= set > + /// representing support for multiple platform IDs. > + /// > + UINT32 ProcessorFlags; > + /// > + /// Specifies the size of the encrypted data in bytes, and must be a > + /// multiple of DWORDs. If this value is 00000000H, then the microcode > + /// update encrypted data is 2000 bytes (or 500 DWORDs). > + /// > + UINT32 DataSize; > + /// > + /// Specifies the total size of the microcode update in bytes. It is t= he > + /// summation of the header size, the encrypted data size and the size= of > + /// the optional extended signature table. This value is always a mult= iple > + /// of 1024. > + /// > + UINT32 TotalSize; > + /// > + /// Reserved fields for future expansion. > + /// > + UINT8 Reserved[12]; > +} CPU_MICROCODE_HEADER; > + > +/// > +/// Extended Signature Table Header Field Definitions > +/// > +typedef struct { > + /// > + /// Specifies the number of extended signature structures (Processor > + /// Signature[n], processor flags[n] and checksum[n]) that exist in th= is > + /// microcode update > + /// > + UINT32 ExtendedSignatureCount; > + /// > + /// Checksum of update extended processor signature table. Used to > + /// verify the integrity of the extended processor signature table. > + /// Checksum is correct when the summation of the DWORDs that > + /// comprise the extended processor signature table results in > + /// 00000000H. > + /// > + UINT32 ExtendedChecksum; > + /// > + /// Reserved fields. > + /// > + UINT8 Reserved[12]; > +} CPU_MICROCODE_EXTENDED_TABLE_HEADER; > + > +/// > +/// Extended Signature Table Field Definitions > +/// > +typedef struct { > + /// > + /// Extended family, extended model, type, family, model, and stepping > + /// of processor that requires this particular update revision (e.g., > + /// 00000650H). Each microcode update is designed specifically for a > + /// given extended family, extended model, type, family, model, and > + /// stepping of the processor. > + /// The BIOS uses the processor signature field in conjunction with th= e > + /// CPUID instruction to determine whether or not an update is > + /// appropriate to load on a processor. The information encoded within > + /// this field exactly corresponds to the bit representations returned= by > + /// the CPUID instruction. > + /// > + CPU_MICROCODE_PROCESSOR_SIGNATURE ProcessorSignature; > + /// > + /// Platform type information is encoded in the lower 8 bits of this 4= - > + /// byte field. Each bit represents a particular platform type for a g= iven > + /// CPUID. The BIOS uses the processor flags field in conjunction with > + /// the platform Id bits in MSR (17H) to determine whether or not an > + /// update is appropriate to load on a processor. Multiple bits may be= set > + /// representing support for multiple platform IDs. > + /// > + UINT32 ProcessorFlag; > + /// > + /// Used by utility software to decompose a microcode update into > + /// multiple microcode updates where each of the new updates is > + /// constructed without the optional Extended Processor Signature > + /// Table. > + /// To calculate the Checksum, substitute the Primary Processor > + /// Signature entry and the Processor Flags entry with the > + /// corresponding Extended Patch entry. Delete the Extended Processor > + /// Signature Table entries. The Checksum is correct when the > + /// summation of all DWORDs that comprise the created Extended > + /// Processor Patch results in 00000000H. > + /// > + UINT32 Checksum; > +} CPU_MICROCODE_EXTENDED_TABLE; > + > +#pragma pack () > + > +#endif > -- > 2.7.4.windows.1