From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 723151A1E30 for ; Mon, 17 Oct 2016 20:32:16 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 17 Oct 2016 20:32:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,508,1473145200"; d="scan'208";a="180853946" Received: from orsmsx103.amr.corp.intel.com ([10.22.225.130]) by fmsmga004.fm.intel.com with ESMTP; 17 Oct 2016 20:32:10 -0700 Received: from orsmsx156.amr.corp.intel.com (10.22.240.22) by ORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 17 Oct 2016 20:32:03 -0700 Received: from orsmsx113.amr.corp.intel.com ([169.254.9.161]) by ORSMSX156.amr.corp.intel.com ([10.22.240.22]) with mapi id 14.03.0248.002; Mon, 17 Oct 2016 20:32:02 -0700 From: "Mudusuru, Giri P" To: "Dong, Guo" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Ma, Maurice" , "Yarlagadda, Satya P" Thread-Topic: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Thread-Index: AQHSKMk+v2XqcSBl3Eys2JF8V0uTqaCtjaXg Date: Tue, 18 Oct 2016 03:32:02 +0000 Message-ID: <4666AEFED60F8E4198B42BB01DCEABDF76F16C6A@ORSMSX113.amr.corp.intel.com> References: In-Reply-To: Accept-Language: en-US, hi-IN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.22.254.139] MIME-Version: 1.0 Subject: Re: [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Oct 2016 03:32:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello Guo, FSP wrapper and Coreboot are bootloaders consuming FSP binary.=20 FSP must get called Post PCI bus enumeration to do the required silicon ini= tialization. Why do we need a PCD to skip it? Thanks, -Giri > -----Original Message----- > From: Dong, Guo > Sent: Monday, October 17, 2016 3:53 PM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen ; Mudusuru, Giri P > ; Dong, Guo > Subject: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if sign= aling > first event. >=20 > PciEnumerationComplete might be signaled to FSP in Coreboot. Add a > PCD PcdNotifyPciEnumerationComplete so FspWrapperNotifyDxe driver > could be used in this case. >=20 > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: gdong1 > --- > .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 18 ++++++++++--= ------ > .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf | 3 ++- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 5 +++++ > 3 files changed, 17 insertions(+), 9 deletions(-) >=20 > diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.= c > b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > index 0797f44..45eae4b 100644 > --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > @@ -246,14 +246,16 @@ FspWrapperNotifyDxeEntryPoint ( > return EFI_SUCCESS; > } >=20 > - ProtocolNotifyEvent =3D EfiCreateProtocolNotifyEvent ( > - &gEfiPciEnumerationCompleteProtocolGuid, > - TPL_CALLBACK, > - OnPciEnumerationComplete, > - NULL, > - &Registration > - ); > - ASSERT (ProtocolNotifyEvent !=3D NULL); > + if (PcdGetBool(PcdNotifyPciEnumerationComplete)) { > + ProtocolNotifyEvent =3D EfiCreateProtocolNotifyEvent ( > + &gEfiPciEnumerationCompleteProtocolGuid, > + TPL_CALLBACK, > + OnPciEnumerationComplete, > + NULL, > + &Registration > + ); > + ASSERT (ProtocolNotifyEvent !=3D NULL); > + } >=20 > Status =3D EfiCreateEventReadyToBootEx ( > TPL_CALLBACK, > diff --git > a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > index f851f68..f28356d 100644 > --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > @@ -61,7 +61,8 @@ > gFspHobGuid ## CONSUMES ## HOB >=20 > [Pcd] > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdNotifyPciEnumerationComplete ## > CONSUMES >=20 > [Depex] > TRUE > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index d9d2d80..52ed9d8 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -74,6 +74,11 @@ > ## This is the base address of FSP-T/M/S >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32| > 0x00000300 >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32 > |0x00000301 > + ## Indicates if the FSP wrapper will notify FSP > PciEnumerationComplete.

> + # TRUE - FSP wrapper will notify PciEnumerationComplete to FSP.
> + # FALSE - FSP wrapper will NOT notify PciEnumerationComplete to FSP.=
> + # @Prompt Notify FSP PciEnumerationComplete. > + > gIntelFsp2WrapperTokenSpaceGuid.PcdNotifyPciEnumerationComplete|TRUE| > BOOLEAN|0x40000009 >=20 > [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32| > 0x00001001 > -- > 2.7.0.windows.1