From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web09.604.1572486855330385717 for ; Wed, 30 Oct 2019 18:54:15 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: bowen.zhou@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Oct 2019 18:54:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,249,1569308400"; d="scan'208";a="225535358" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga004.fm.intel.com with ESMTP; 30 Oct 2019 18:54:15 -0700 Received: from fmsmsx601.amr.corp.intel.com (10.18.126.81) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 30 Oct 2019 18:54:14 -0700 Received: from fmsmsx601.amr.corp.intel.com (10.18.126.81) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 30 Oct 2019 18:54:14 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1713.5 via Frontend Transport; Wed, 30 Oct 2019 18:54:13 -0700 Received: from shsmsx106.ccr.corp.intel.com ([169.254.10.248]) by shsmsx102.ccr.corp.intel.com ([169.254.2.108]) with mapi id 14.03.0439.000; Thu, 31 Oct 2019 09:54:12 +0800 From: "Zhou, Bowen" To: "Chiu, Chasel" , "devel@edk2.groups.io" CC: "Lu, Shifei A" , "Oram, Isaac W" Subject: Re: [edk2-platforms: PATCH v2 5/6] PurleyOpenBoardPkg/BoardMtOlympus: Add SetCacheLib library class. Thread-Topic: [edk2-platforms: PATCH v2 5/6] PurleyOpenBoardPkg/BoardMtOlympus: Add SetCacheLib library class. Thread-Index: AQHVj4JtPkjG9tr8zUSY5vAEefHhEadz/Pxw Date: Thu, 31 Oct 2019 01:54:11 +0000 Message-ID: <477DBD36544FF849A8AD024E912EEC0F6452A4BB@SHSMSX106.ccr.corp.intel.com> References: <20191031002952.3860-1-chasel.chiu@intel.com> <20191031002952.3860-6-chasel.chiu@intel.com> In-Reply-To: <20191031002952.3860-6-chasel.chiu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: bowen.zhou@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Xiaohu Zhou -----Original Message----- From: Chiu, Chasel=20 Sent: Thursday, October 31, 2019 8:30 AM To: devel@edk2.groups.io Cc: Lu, Shifei A ; Zhou, Bowen ; Oram, Isaac W Subject: [edk2-platforms: PATCH v2 5/6] PurleyOpenBoardPkg/BoardMtOlympus: = Add SetCacheLib library class. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2314 Include SetCacheLib from MinPlatformPkg. Cc: Shifei A Lu Cc: Xiaohu Zhou Cc: Isaac W Oram Signed-off-by: Chasel Chiu --- Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.d= sc b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc index 595ffd4144..c7be68d979 100644 --- a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc @@ -1,6 +1,6 @@ ### @file # -# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2019, Intel Corporation. All rights=20 +reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -135,6 +135,7 @@ !in= clude $(RC_PKG)/RcDxeLib.dsc !include $(SKT_PKG)/SktDxeLib.dsc !include $= (PCH_PKG)/PchDxeLib.dsc + SetCacheLib|MinPlatformPkg/Library/SetCacheLib/SetCacheLib.inf =20 [LibraryClasses.X64] BoardAcpiTableLib|$(BOARD_PKG)/$(BOARD_NAME)/Library/BoardAcpiLib/DxeBoa= rdAcpiTableLib.inf -- 2.13.3.windows.1