From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id CAA64AC1AC0 for ; Wed, 8 Nov 2023 21:22:57 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=+dv4Q26b5dEqTvIPmpRGnIhf8RycDZjKHuBmr6UKYPA=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1699478576; v=1; b=Z965UkNylgsGiCmbyJK9AoLGYwlsrfXAuVaKOaT2J69v5pwDORX+x1Mku0pAnqzHZFUNZSFX gGLIHYn5POKWnr7cH5oNkuxDG4AZ/4YuZIWS/6MSfLyQh2L8heondc9Tkk6UuVFlaRoByrkAXqF EjXO85+CF4zZ5i8XtZZW6cMI= X-Received: by 127.0.0.2 with SMTP id NnevYY7687511xyhR1kZ9wfv; Wed, 08 Nov 2023 13:22:56 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.104578.1699478575892975760 for ; Wed, 08 Nov 2023 13:22:56 -0800 X-Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-662-I7v2Dc__P8WdS3e0TJKx3g-1; Wed, 08 Nov 2023 16:22:51 -0500 X-MC-Unique: I7v2Dc__P8WdS3e0TJKx3g-1 X-Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 660DB3C11C70; Wed, 8 Nov 2023 21:22:51 +0000 (UTC) X-Received: from [10.39.192.41] (unknown [10.39.192.41]) by smtp.corp.redhat.com (Postfix) with ESMTPS id EC5FB25C1; Wed, 8 Nov 2023 21:22:49 +0000 (UTC) Message-ID: <479a2b63-22f4-7438-1f23-9fefa0532853@redhat.com> Date: Wed, 8 Nov 2023 22:22:48 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/PiSmmCpuDxeSmm: Change CR4.CET bit only To: devel@edk2.groups.io, w.sheng@intel.com Cc: Eric Dong , Ray Ni , Wu Jiaxin , Tan Dun References: <20231106090754.820-1-w.sheng@intel.com> <20231106090754.820-3-w.sheng@intel.com> From: "Laszlo Ersek" In-Reply-To: <20231106090754.820-3-w.sheng@intel.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 77x2w4T1el5ki3lvEDsACn9vx7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=Z965UkNy; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On 11/6/23 10:07, Sheng Wei wrote: > Do not use fixed CR4 value 0x668, change CR4.CET bit only. >=20 > Signed-off-by: Sheng Wei > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Wu Jiaxin > Cc: Tan Dun > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 9 ++++++--- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 3 ++- > 2 files changed, 8 insertions(+), 4 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/Pi= SmmCpuDxeSmm/Ia32/SmiEntry.nasm > index 68332e2c3f..a087576a54 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > @@ -260,7 +260,8 @@ CetInterruptDone: > bts ecx, 16 ; set WP > mov cr0, ecx > =20 > - mov eax, 0x668 | CR4_CET > + mov eax, cr4 > + bts eax, CR4_CET_BIT > mov cr4, eax > =20 > setssbsy > @@ -292,8 +293,10 @@ CetDone: > xor edx, edx > wrmsr > =20 > - mov eax, 0x668 > - mov cr4, eax ; disable CET > + ; clear CR4.CET bit > + mov eax, cr4 > + btr eax, CR4_CET_BIT > + mov cr4, eax > =20 > mov ecx, MSR_IA32_PL0_SSP > pop eax > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiS= mmCpuDxeSmm/X64/SmiEntry.nasm > index 007fbff640..7aed7c8dda 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > @@ -287,7 +287,8 @@ CetInterruptDone: > bts ecx, 16 ; set WP > mov cr0, rcx > =20 > - mov eax, 0x668 | CR4_CET > + mov rax, cr4 > + bts rax, CR4_CET_BIT > mov cr4, rax > =20 > setssbsy I didn't understand why the X64 code here didn't contain the "btr" counterpart of "bts". Well the reason is that the "missing" btr is actually introduced in the previous patch. I find that confusing. I think that, once you have "Cet.inc", you should separately replace CR4_CET with CR4_CET_BIT, both in "Cet.inc" and in the three existent locations (two in the IA32 entry code and one in the X64 entry code). *Then* you could proceed to clearing CR4.CET in the subsequent patch, using CR4_CET_BIT. Laszlo -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110927): https://edk2.groups.io/g/devel/message/110927 Mute This Topic: https://groups.io/mt/102416574/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-