From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Jordan Justen <jordan.l.justen@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
"Singh, Brijesh" <brijesh.singh@amd.com>
Subject: [RFC PATCH v2 24/44] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO)
Date: Thu, 19 Sep 2019 19:52:51 +0000 [thread overview]
Message-ID: <47fc4526590445d18093cf6fcda057da2c909412.1568922729.git.thomas.lendacky@amd.com> (raw)
In-Reply-To: <cover.1568922728.git.thomas.lendacky@amd.com>
From: Tom Lendacky <thomas.lendacky@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a NPF intercept for an NPT entry with a reserved bit set
generates a #VC exception. This condition is assumed to be an MMIO access.
VMGEXIT must be used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support a NPF NAE
event for MMIO. Parse the instruction that generated the #VC exception,
setting the required register values in the GHCB and creating the proper
SW_EXIT_INFO1, SW_EXITINFO2 and SW_SCRATCH values in the GHCB.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
.../X64/AMDSevVcCommon.c | 285 +++++++++++++++++-
1 file changed, 283 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
index 748883419752..aac460c388e3 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
@@ -79,8 +79,8 @@ typedef struct {
UINT8 Scale;
} Sib;
- UINTN RegData;
- UINTN RmData;
+ INTN RegData;
+ INTN RmData;
} SEV_ES_INSTRUCTION_OPCODE_EXT;
typedef struct {
@@ -152,6 +152,198 @@ GhcbSetRegValid (
Ghcb->SaveArea.ValidBitmap[RegIndex] |= (1 << RegBit);
}
+STATIC
+INT64 *
+GetRegisterPointer (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ UINT8 Register
+ )
+{
+ UINT64 *Reg;
+
+ switch (Register) {
+ case 0:
+ Reg = &Regs->Rax;
+ break;
+ case 1:
+ Reg = &Regs->Rcx;
+ break;
+ case 2:
+ Reg = &Regs->Rdx;
+ break;
+ case 3:
+ Reg = &Regs->Rbx;
+ break;
+ case 4:
+ Reg = &Regs->Rsp;
+ break;
+ case 5:
+ Reg = &Regs->Rbp;
+ break;
+ case 6:
+ Reg = &Regs->Rsi;
+ break;
+ case 7:
+ Reg = &Regs->Rdi;
+ break;
+ case 8:
+ Reg = &Regs->R8;
+ break;
+ case 9:
+ Reg = &Regs->R9;
+ break;
+ case 10:
+ Reg = &Regs->R10;
+ break;
+ case 11:
+ Reg = &Regs->R11;
+ break;
+ case 12:
+ Reg = &Regs->R12;
+ break;
+ case 13:
+ Reg = &Regs->R13;
+ break;
+ case 14:
+ Reg = &Regs->R14;
+ break;
+ case 15:
+ Reg = &Regs->R15;
+ break;
+ default:
+ Reg = NULL;
+ }
+ ASSERT (Reg);
+
+ return (INT64 *) Reg;
+}
+
+STATIC
+VOID
+UpdateForDisplacement (
+ SEV_ES_INSTRUCTION_DATA *InstructionData,
+ UINTN Size
+ )
+{
+ InstructionData->DisplacementSize = Size;
+ InstructionData->Immediate += Size;
+ InstructionData->End += Size;
+}
+
+STATIC
+BOOLEAN
+IsRipRelative (
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+
+ return ((InstructionData == LongMode64Bit) &&
+ (Ext->ModRm.Mod == 0) &&
+ (Ext->ModRm.Rm == 5) &&
+ (InstructionData->SibPresent == FALSE));
+}
+
+STATIC
+UINTN
+GetEffectiveMemoryAddress (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+ INTN EffectiveAddress = 0;
+
+ if (IsRipRelative (InstructionData)) {
+ /* RIP-relative displacement is a 32-bit signed value */
+ INT32 RipRelative = *(INT32 *) InstructionData->Displacement;
+
+ UpdateForDisplacement (InstructionData, 4);
+ return (UINTN) ((INTN) Regs->Rip + RipRelative);
+ }
+
+ switch (Ext->ModRm.Mod) {
+ case 1:
+ UpdateForDisplacement (InstructionData, 1);
+ EffectiveAddress += (INT8) (*(INT8 *) (InstructionData->Displacement));
+ break;
+ case 2:
+ switch (InstructionData->AddrSize) {
+ case Size16Bits:
+ UpdateForDisplacement (InstructionData, 2);
+ EffectiveAddress += (INT16) (*(INT16 *) (InstructionData->Displacement));
+ break;
+ default:
+ UpdateForDisplacement (InstructionData, 4);
+ EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+ break;
+ }
+ break;
+ }
+
+ if (InstructionData->SibPresent) {
+ if (Ext->Sib.Index != 4) {
+ EffectiveAddress += (*GetRegisterPointer (Regs, Ext->Sib.Index) << Ext->Sib.Scale);
+ }
+
+ if ((Ext->Sib.Base != 5) || Ext->ModRm.Mod) {
+ EffectiveAddress += *GetRegisterPointer (Regs, Ext->Sib.Base);
+ } else {
+ UpdateForDisplacement (InstructionData, 4);
+ EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+ }
+ } else {
+ EffectiveAddress += *GetRegisterPointer (Regs, Ext->ModRm.Rm);
+ }
+
+ return (UINTN) EffectiveAddress;
+}
+
+STATIC
+VOID
+DecodeModRm (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_REX_PREFIX *RexPrefix = &InstructionData->RexPrefix;
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+ SEV_ES_INSTRUCTION_MODRM *ModRm = &InstructionData->ModRm;
+ SEV_ES_INSTRUCTION_SIB *Sib = &InstructionData->Sib;
+
+ InstructionData->ModRmPresent = TRUE;
+ ModRm->Uint8 = *(InstructionData->End);
+
+ InstructionData->Displacement++;
+ InstructionData->Immediate++;
+ InstructionData->End++;
+
+ Ext->ModRm.Mod = ModRm->Bits.Mod;
+ Ext->ModRm.Reg = (RexPrefix->Bits.R << 3) | ModRm->Bits.Reg;
+ Ext->ModRm.Rm = (RexPrefix->Bits.B << 3) | ModRm->Bits.Rm;
+
+ Ext->RegData = *GetRegisterPointer (Regs, Ext->ModRm.Reg);
+
+ if (Ext->ModRm.Mod == 3) {
+ Ext->RmData = *GetRegisterPointer (Regs, Ext->ModRm.Rm);
+ } else {
+ if (ModRm->Bits.Rm == 4) {
+ InstructionData->SibPresent = TRUE;
+ Sib->Uint8 = *(InstructionData->End);
+
+ InstructionData->Displacement++;
+ InstructionData->Immediate++;
+ InstructionData->End++;
+
+ Ext->Sib.Scale = Sib->Bits.Scale;
+ Ext->Sib.Index = (RexPrefix->Bits.X << 3) | Sib->Bits.Index;
+ Ext->Sib.Base = (RexPrefix->Bits.B << 3) | Sib->Bits.Base;
+ }
+
+ Ext->RmData = GetEffectiveMemoryAddress (Regs, InstructionData);
+ }
+}
+
STATIC
VOID
DecodePrefixes (
@@ -262,6 +454,91 @@ InitInstructionData (
DecodePrefixes (Regs, InstructionData);
}
+STATIC
+UINTN
+MmioExit (
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ UINT64 ExitInfo1, ExitInfo2;
+ UINTN Status;
+ UINTN Bytes;
+ INTN *Register;
+
+ Bytes = 0;
+
+ switch (*(InstructionData->OpCodes)) {
+ /* MMIO write */
+ case 0x88:
+ Bytes = 1;
+ case 0x89:
+ DecodeModRm (Regs, InstructionData);
+ Bytes = (Bytes) ? Bytes
+ : (InstructionData->DataSize == Size16Bits) ? 2
+ : (InstructionData->DataSize == Size32Bits) ? 4
+ : (InstructionData->DataSize == Size64Bits) ? 8
+ : 0;
+
+ if (InstructionData->Ext.ModRm.Mod == 3) {
+ /* NPF on two register operands??? */
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitNpf, 0);
+ ASSERT (0);
+ }
+
+ ExitInfo1 = InstructionData->Ext.RmData;
+ ExitInfo2 = Bytes;
+ CopyMem (Ghcb->SharedBuffer, &InstructionData->Ext.RegData, Bytes);
+
+ Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+ Status = VmgExit (Ghcb, SvmExitMmioWrite, ExitInfo1, ExitInfo2);
+ if (Status) {
+ return Status;
+ }
+ break;
+
+ /* MMIO read */
+ case 0x8A:
+ Bytes = 1;
+ case 0x8B:
+ DecodeModRm (Regs, InstructionData);
+ Bytes = (Bytes) ? Bytes
+ : (InstructionData->DataSize == Size16Bits) ? 2
+ : (InstructionData->DataSize == Size32Bits) ? 4
+ : (InstructionData->DataSize == Size64Bits) ? 8
+ : 0;
+ if (InstructionData->Ext.ModRm.Mod == 3) {
+ /* NPF on two register operands??? */
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitNpf, 0);
+ ASSERT (0);
+ }
+
+ ExitInfo1 = InstructionData->Ext.RmData;
+ ExitInfo2 = Bytes;
+
+ Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+ Status = VmgExit (Ghcb, SvmExitMmioRead, ExitInfo1, ExitInfo2);
+ if (Status) {
+ return Status;
+ }
+
+ Register = GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Reg);
+ if (Bytes == 4) {
+ /* Zero-extend for 32-bit operation */
+ *Register = 0;
+ }
+ CopyMem (Register, Ghcb->SharedBuffer, Bytes);
+ break;
+
+ default:
+ Status = GP_EXCEPTION;
+ ASSERT (0);
+ }
+
+ return Status;
+}
+
STATIC
UINTN
UnsupportedExit (
@@ -598,6 +875,10 @@ DoVcCommon (
NaeExit = MsrExit;
break;
+ case SvmExitNpf:
+ NaeExit = MmioExit;
+ break;
+
default:
NaeExit = UnsupportedExit;
}
--
2.17.1
next prev parent reply other threads:[~2019-09-19 19:52 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-19 19:52 [RFC PATCH v2 00/44] SEV-ES guest support Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 01/44] MdePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 02/44] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2019-09-24 11:53 ` [edk2-devel] " Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 03/44] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2019-09-24 11:59 ` [edk2-devel] " Laszlo Ersek
2019-09-24 14:43 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 04/44] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2019-09-24 13:42 ` [edk2-devel] " Laszlo Ersek
2019-09-24 13:50 ` Laszlo Ersek
2019-09-24 18:57 ` Lendacky, Thomas
2019-09-25 14:45 ` Laszlo Ersek
2019-09-30 19:29 ` Laszlo Ersek
2019-09-30 19:55 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 05/44] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 06/44] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2019-09-25 8:09 ` [edk2-devel] " Laszlo Ersek
2019-09-25 17:36 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 07/44] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2019-09-25 8:27 ` [edk2-devel] " Laszlo Ersek
2019-09-25 17:52 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 08/44] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2019-09-26 8:00 ` [edk2-devel] " Laszlo Ersek
2019-09-26 14:00 ` Lendacky, Thomas
2019-09-30 18:52 ` Laszlo Ersek
2019-09-30 19:49 ` Lendacky, Thomas
2019-09-30 19:12 ` Laszlo Ersek
2019-09-30 19:51 ` Lendacky, Thomas
2019-10-02 10:23 ` Laszlo Ersek
2019-10-02 14:43 ` Lendacky, Thomas
2019-10-02 15:55 ` Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 09/44] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 10/44] OvmfPkg: A per-CPU variable area for #VC usage Lendacky, Thomas
2019-09-26 8:17 ` [edk2-devel] " Laszlo Ersek
2019-09-26 14:46 ` Lendacky, Thomas
2019-09-30 19:15 ` Laszlo Ersek
2019-09-30 19:52 ` Lendacky, Thomas
2019-10-02 11:51 ` Laszlo Ersek
2019-10-02 16:06 ` Lendacky, Thomas
2019-10-03 9:06 ` Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 11/44] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2019-10-02 12:05 ` [edk2-devel] " Laszlo Ersek
2019-10-02 16:10 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 12/44] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 13/44] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 14/44] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 15/44] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 16/44] OvmfPkg/MemEncryptSevLib: Make MemEncryptSevLib available during SEC Lendacky, Thomas
2019-10-02 12:24 ` [edk2-devel] " Laszlo Ersek
2019-10-02 12:30 ` Laszlo Ersek
2019-10-02 16:16 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 17/44] UefiCpuPkg/CpuExceptionHandler: Add #VC exception handling for Sec phase Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 18/44] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2019-10-02 12:31 ` [edk2-devel] " Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 19/44] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 20/44] UefiCpuPkg/CpuExceptionHandler: Support string IO " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 21/44] MdePkg: Add support for the XGETBV instruction Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 22/44] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 23/44] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2019-09-19 19:52 ` Lendacky, Thomas [this message]
2019-09-19 19:52 ` [RFC PATCH v2 25/44] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 26/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 27/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 28/44] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 29/44] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 30/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 31/44] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 32/44] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 33/44] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 34/44] UefiCpuPkg/MpInitLib: Update CPU MP data with a flag to indicate if SEV-ES is active Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 36/44] UefiCpuPkg: Add a 16-bit protected mode code segment descriptor Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 35/44] MdeModulePkg: Reserve " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 37/44] OvmfPkg: Add support for SEV-ES AP reset vector re-directing Lendacky, Thomas
2019-10-02 14:54 ` [edk2-devel] " Laszlo Ersek
2019-10-02 17:33 ` Lendacky, Thomas
2019-10-03 9:09 ` Laszlo Ersek
2019-09-19 19:53 ` [RFC PATCH v2 38/44] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2019-10-02 15:15 ` [edk2-devel] " Laszlo Ersek
2019-10-02 15:26 ` Laszlo Ersek
2019-10-02 18:07 ` Lendacky, Thomas
2019-10-03 10:12 ` Laszlo Ersek
2019-10-03 10:32 ` Laszlo Ersek
2019-10-03 15:12 ` Lendacky, Thomas
2019-10-10 23:17 ` Lendacky, Thomas
2019-10-10 23:56 ` Andrew Fish
2019-10-11 8:56 ` Laszlo Ersek
2019-10-12 6:42 ` Andrew Fish
2019-10-12 7:46 ` Liming Gao
2019-10-12 18:50 ` Andrew Fish
2019-10-14 13:11 ` Laszlo Ersek
2019-10-14 19:11 ` Andrew Fish
2019-10-02 17:58 ` Lendacky, Thomas
2019-10-03 9:21 ` Laszlo Ersek
2019-09-19 19:53 ` [RFC PATCH v2 40/44] MdePkg: Add a finalization function to the CPU protocol Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 39/44] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2019-10-02 14:38 ` [edk2-devel] " Laszlo Ersek
2019-09-20 13:16 ` [RFC PATCH v2 42/44] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2019-12-12 8:24 ` Ni, Ray
2019-12-13 16:35 ` Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 41/44] UefiCpuPkg/MpInitLib: Add MP finalization interface to MpInitLib Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 43/44] UefiCpuPkg/CpuDxe: Provide an DXE MP finalization routine to support SEV-ES Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 44/44] MdeModulePkg/DxeCore: Perform the CPU protocol finalization support Lendacky, Thomas
2019-09-20 19:24 ` [RFC PATCH v2 00/44] SEV-ES guest support Lendacky, Thomas
2019-09-24 1:55 ` [edk2-devel] " Dong, Eric
2019-09-24 14:31 ` Lendacky, Thomas
2019-09-25 22:31 ` Ni, Ray
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