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From: "Yoshinoya" <yoshinoyatoko@163.com>
To: devel@edk2.groups.io
Subject: [edk2-devel] PciHostBridge: dynamic pcie bus limit assignment
Date: Tue, 23 May 2023 17:55:03 +0800 (CST)	[thread overview]
Message-ID: <48b4a45c.70be.18848089a1d.Coremail.yoshinoyatoko@163.com> (raw)
In-Reply-To: <2ee1fd81.20a.1866204f2cb.Coremail.yoshinoyatoko@163.com>

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Hello,
Does PciHostBridge driver support dynamic pcie bus limit assignement?


For example, Xeon chip supports allocating pci bus range dynamically.
So, on a dedicated motherboard, during BIOS Post, user could change every cpu socket's bus limit assignment dynamically ,
and so user could influene some pcie devices enumeration order.


Thanks 


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  parent reply	other threads:[~2023-05-23  9:55 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-05 11:32 [edk2-devel] Python368.efi failed to run in shell environment Yoshinoya
2022-10-05 16:28 ` Michael D Kinney
2022-10-11 10:20   ` Yoshinoya
2022-10-18  9:04     ` Jayaprakash, N
2022-10-19  8:30       ` Yoshinoya
2022-10-19 13:16         ` Jayaprakash, N
2022-10-20  3:06           ` Yoshinoya
2022-10-20  3:18             ` Jayaprakash, N
2022-11-08  3:16 ` [edk2-devel] Access 64bit address space in 32bit mode Yoshinoya
2022-11-09 17:20   ` Andrew Fish
2022-11-09 18:58     ` vincent zimmer
2022-11-09 20:14       ` Andrew Fish
2023-02-18  0:55         ` [edk2-devel] PciBus scan: Does it support scan from EndBusNum to StartBusNum? Yoshinoya
2023-02-20  4:28           ` Yoshinoya
2023-02-21  1:27           ` Yoshinoya
2023-02-21  2:47             ` Yoshinoya
2023-02-21 19:18           ` Pedro Falcato
2023-02-22  1:10             ` Tiger Liu(BJ-RD)
2023-02-22  1:22               ` Pedro Falcato
2023-05-23  9:55           ` Yoshinoya [this message]
2022-11-09 20:40     ` [edk2-devel] Access 64bit address space in 32bit mode Brian J. Johnson
2023-01-03  9:04       ` [edk2-devel] PciBus driver: support pcie 4.0 bus/device enumeration ? Yoshinoya

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