From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 1FA4A941BA3 for ; Wed, 11 Oct 2023 16:59:05 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=Ha71FB/f04WwDtDidGCiNi1tBIysVt7gYN7WXYLikBw=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-id:In-reply-to:References:MIME-version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-transfer-encoding; s=20140610; t=1697043544; v=1; b=neAJhLn0vYi0yEWumOo3RlFaDhi5D11tSryvihHzDZsIeRtj3YOsAPxGJxxL7R6ria1VNBU1 IQnr6YexkW1GGDqP8UqXBXH0z2gkGqzUbkL8pKr9Z7DwqUZg6TLSMymqC84yAvBnvSks9vibEtp bwH5308W/4Ul/gtBtoLzHTdM= X-Received: by 127.0.0.2 with SMTP id nW9TYY7687511xDgLXeytBGQ; Wed, 11 Oct 2023 09:59:04 -0700 X-Received: from ma-mailsvcp-mx-lapp02.apple.com (ma-mailsvcp-mx-lapp02.apple.com [17.32.222.23]) by mx.groups.io with SMTP id smtpd.web10.21905.1697043346462445238 for ; Wed, 11 Oct 2023 09:55:46 -0700 X-Received: from rn-mailsvcp-mta-lapp04.rno.apple.com (rn-mailsvcp-mta-lapp04.rno.apple.com [10.225.203.152]) by ma-mailsvcp-mx-lapp02.apple.com (Oracle Communications Messaging Server 8.1.0.23.20230328 64bit (built Mar 28 2023)) with ESMTPS id <0S2D00VI1J0VXB00@ma-mailsvcp-mx-lapp02.apple.com> for devel@edk2.groups.io; Wed, 11 Oct 2023 09:55:45 -0700 (PDT) X-Proofpoint-GUID: HbWC1fbns566u40fR14OdTT8iEBkWuEt X-Proofpoint-ORIG-GUID: HbWC1fbns566u40fR14OdTT8iEBkWuEt X-Received: from rn-mailsvcp-relay-lapp02.rno.apple.com (rn-mailsvcp-relay-lapp02.rno.apple.com [17.179.253.11]) by rn-mailsvcp-mta-lapp04.rno.apple.com (Oracle Communications Messaging Server 8.1.0.23.20230328 64bit (built Mar 28 2023)) with ESMTPS id <0S2D00JSHJ0VBOO0@rn-mailsvcp-mta-lapp04.rno.apple.com>; Wed, 11 Oct 2023 09:55:44 -0700 (PDT) X-Received: from process_milters-daemon.rn-mailsvcp-relay-lapp02.rno.apple.com by rn-mailsvcp-relay-lapp02.rno.apple.com (Oracle Communications Messaging Server 8.1.0.23.20230328 64bit (built Mar 28 2023)) id <0S2D00Q00IQX0P00@rn-mailsvcp-relay-lapp02.rno.apple.com>; Wed, 11 Oct 2023 09:55:43 -0700 (PDT) X-Va-A: X-Va-T-CD: 3a2c4b67349838e305a7a1f00570e43c X-Va-E-CD: 4916b2d94f96539db03981f5d28191b6 X-Va-R-CD: c6c5b67294ed0b6ced1e8f8a2f2d93e1 X-Va-ID: ec344788-3192-44af-baff-1ae6b191e142 X-Va-CD: 0 X-V-A: X-V-T-CD: 3a2c4b67349838e305a7a1f00570e43c X-V-E-CD: 4916b2d94f96539db03981f5d28191b6 X-V-R-CD: c6c5b67294ed0b6ced1e8f8a2f2d93e1 X-V-ID: 9b72df88-db96-4ae8-a9de-158bd0519573 X-V-CD: 0 X-Received: from mr41p01nt-relayp01.apple.com (unknown [17.114.194.94]) by rn-mailsvcp-relay-lapp02.rno.apple.com (Oracle Communications Messaging Server 8.1.0.23.20230328 64bit (built Mar 28 2023)) with ESMTP id <0S2D00HURJ0VAQ60@rn-mailsvcp-relay-lapp02.rno.apple.com>; Wed, 11 Oct 2023 09:55:43 -0700 (PDT) From: "Page Chen via groups.io" To: devel@edk2.groups.io Cc: Page Chen , Hao A Wu , Ray Ni , Andrew Fish , Giri Mudusuru Subject: [edk2-devel] [PATCH 1/1] MdeModulePkg-SdMmcPciHcDxe: Add missing defines for Capabilities Reg Date: Wed, 11 Oct 2023 09:48:57 -0700 Message-id: <49e6d0efe414b7d5afd77f40984287fb83e98216.1697042907.git.paiching_chen@apple.com> In-reply-to: References: MIME-version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,paiching_chen@apple.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: uyOwFdJnIsE9pzI0plXdDQo8x7686176AA= Content-transfer-encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=neAJhLn0; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Add missing defines from 2.2.26 Capabilities Register (Cat.C Offset 040h) BIT35: UHS-II Support BIT59: ADMA3 Support BIT60: 1.8V VDD2 Support Cc: Hao A Wu Cc: Ray Ni Cc: Andrew Fish Cc: Giri Mudusuru Signed-off-by: Page Chen --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 4 ++++ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 16 +++++++++++----- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 2e7497a89db1..9e8a7f4e436d 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -8,6 +8,7 @@ =0D Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.=0D Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.
=0D + Copyright (C) 2023, Apple Inc. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -59,6 +60,7 @@ DumpCapabilityReg ( DEBUG ((DEBUG_INFO, " SDR50 Support %a\n", Capability->Sdr50 ? "TR= UE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " SDR104 Support %a\n", Capability->Sdr104 ? "T= RUE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " DDR50 Support %a\n", Capability->Ddr50 ? "TR= UE" : "FALSE"));=0D + DEBUG ((DEBUG_INFO, " UHS-II Support %a\n", Capability->UhsII ? "TR= UE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " Driver Type A %a\n", Capability->DriverTypeA= ? "TRUE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " Driver Type C %a\n", Capability->DriverTypeC= ? "TRUE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " Driver Type D %a\n", Capability->DriverTypeD= ? "TRUE" : "FALSE"));=0D @@ -72,6 +74,8 @@ DumpCapabilityReg ( DEBUG ((DEBUG_INFO, " SDR50 Tuning %a\n", Capability->TuningSDR50= ? "TRUE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " Retuning Mode Mode %d\n", Capability->Retuni= ngMod + 1));=0D DEBUG ((DEBUG_INFO, " Clock Multiplier M =3D %d\n", Capability->ClkMu= ltiplier + 1));=0D + DEBUG ((DEBUG_INFO, " ADMA3 Support %a\n", Capability->Adma3 ? "TR= UE" : "FALSE"));=0D + DEBUG ((DEBUG_INFO, " 1.8V VDD2 %a\n", Capability->Vdd2Voltage= 18 ? "TRUE" : "FALSE"));=0D DEBUG ((DEBUG_INFO, " HS 400 %a\n", Capability->Hs400 ? "TR= UE" : "FALSE"));=0D return;=0D }=0D diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h index 91155770e098..0641b8989077 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h @@ -2,10 +2,13 @@ =0D Provides some data structure definitions used by the SD/MMC host control= ler driver.=0D =0D -Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.=0D -Copyright (c) 2015, Intel Corporation. All rights reserved.
=0D -SPDX-License-Identifier: BSD-2-Clause-Patent=0D + Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.=0D + Copyright (c) 2015, Intel Corporation. All rights reserved.
=0D + Copyright (C) 2023, Apple Inc. All rights reserved.
=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D + @par Revision Reference:=0D + - SD Host Controller Simplified Specification, Version 4.20, July 25, = 2018=0D **/=0D =0D #ifndef _SD_MMC_PCI_HCI_H_=0D @@ -174,7 +177,7 @@ typedef struct { UINT32 Sdr50 : 1; // bit 32=0D UINT32 Sdr104 : 1; // bit 33=0D UINT32 Ddr50 : 1; // bit 34=0D - UINT32 Reserved3 : 1; // bit 35=0D + UINT32 UhsII : 1; // bit 35=0D UINT32 DriverTypeA : 1; // bit 36=0D UINT32 DriverTypeC : 1; // bit 37=0D UINT32 DriverTypeD : 1; // bit 38=0D @@ -184,7 +187,10 @@ typedef struct { UINT32 TuningSDR50 : 1; // bit 45=0D UINT32 RetuningMod : 2; // bit 46:47=0D UINT32 ClkMultiplier : 8; // bit 48:55=0D - UINT32 Reserved5 : 7; // bit 56:62=0D + UINT32 Reserved56_58 : 3; // bit 56:58=0D + UINT32 Adma3 : 1; // bit 59=0D + UINT32 Vdd2Voltage18 : 1; // bit 60=0D + UINT32 Reserved61_61 : 2; // bit 61:62=0D UINT32 Hs400 : 1; // bit 63=0D } SD_MMC_HC_SLOT_CAP;=0D =0D --=20 2.39.3 (Apple Git-145) -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109525): https://edk2.groups.io/g/devel/message/109525 Mute This Topic: https://groups.io/mt/101900998/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-