From: "Gao, Liming" <liming.gao@intel.com>
To: Bhupesh Sharma <bhupesh.sharma@nxp.com>,
"edk2-devel@ml01.01.org" <edk2-devel@ml01.01.org>
Subject: Re: [PATCH 1/1] MdePkg/IoLib: Add support for big-endian MMIO
Date: Mon, 17 Oct 2016 03:10:02 +0000 [thread overview]
Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14B49505E@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <1476437615-29534-1-git-send-email-bhupesh.sharma@nxp.com>
Bhupesh:
In this patch, five class APIs are new added. They are MmioReadBe16(),MmioWriteBe16(),MmioClearSetBe16(),MmioSetBitsBe16(),MmioClearBitsBe16(). In fact, they can map to the existing MMIO APIs. Below is their mapping. And, I understand some hardware uses little-endian MMIO interfaces, other hardware use big-endian MMIO interfaces. But, there are no hardware to require little-endian and big-endian at the same time. If so, we don't need to expose MmioRead16() and MmioReadBe16() API both in the same library instances. For your case, I suggest to add new IoLib library instance that implement the existing MMIO APIs with the big-endian way. This library instance can be placed into ARM device package.
MmioReadBe16() --> MmioRead16()
MmioWriteBe16() --> MmioWrite16()
MmioClearSetBe16() --> MmioAndThenOr16()
MmioSetBitsBe16() --> MmioOr16()
MmioClearBitsBe16() --> MmioAnd16()
Thanks
Liming
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Bhupesh Sharma
> Sent: Friday, October 14, 2016 5:34 PM
> To: edk2-devel@ml01.01.org
> Subject: [edk2] [PATCH 1/1] MdePkg/IoLib: Add support for big-endian
> MMIO
>
> Various IPs on NXP/FSL SoCs having ARM64 cores have big-endian
> MMIO interfaces.
>
> This implies that a byte-swap operation is needed to read/write
> such BE MMIO registers from the LE ARM64 cores.
>
> This patch adds the support for the same.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com>
> ---
> MdePkg/Include/Library/IoLib.h | 364 ++++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 479
> +++++++++++++++++++++++++++
> 2 files changed, 843 insertions(+)
>
> diff --git a/MdePkg/Include/Library/IoLib.h
> b/MdePkg/Include/Library/IoLib.h
> index a0dd16b..f5842e6 100644
> --- a/MdePkg/Include/Library/IoLib.h
> +++ b/MdePkg/Include/Library/IoLib.h
> @@ -2658,6 +2658,370 @@ MmioWriteBuffer64 (
> IN CONST UINT64 *Buffer
> );
>
> +/**
> + Reads a 16-bit MMIO register in Big Endian format.
> +
> + Reads the 16-bit MMIO register specified by Address. The 16-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioReadBe16 (
> + IN UINTN Address
> + );
> +
> +/**
> + Writes a 16-bit MMIO register in Big Endian format.
> +
> + Writes the 16-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioWriteBe16 (
> + IN UINTN Address,
> + IN UINT16 Value
> + );
> +
> +/**
> + Reads a 32-bit MMIO register in Big Endian format.
> +
> + Reads the 32-bit MMIO register specified by Address. The 32-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioReadBe32 (
> + IN UINTN Address
> + );
> +
> +/**
> + Writes a 32-bit MMIO register in Big Endian format.
> +
> + Writes the 32-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioWriteBe32 (
> + IN UINTN Address,
> + IN UINT32 Value
> + );
> +
> +
> +/**
> + Reads a 64-bit MMIO register in Big Endian format.
> +
> + Reads the 64-bit MMIO register specified by Address. The 64-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioReadBe64 (
> + IN UINTN Address
> + );
> +
> +
> +/**
> + Writes a 64-bit MMIO register in Big Endian format.
> +
> + Writes the 64-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioWriteBe64 (
> + IN UINTN Address,
> + IN UINT64 Value
> + );
> +
> +/**
> + Clear and set a 8-bit MMIO register.
> +
> + Mask the 8-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 8-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioClearSet8 (
> + IN UINTN Address,
> + IN UINT8 Mask,
> + IN UINT8 Value
> + );
> +
> +/**
> + Clear and set a 16-bit MMIO register in Big Endian format.
> +
> + Mask the 16-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 16-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioClearSetBe16 (
> + IN UINTN Address,
> + IN UINT16 Mask,
> + IN UINT16 Value
> + );
> +
> +/**
> + Clear and set a 32-bit MMIO register in Big Endian format.
> +
> + Mask the 32-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 32-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioClearSetBe32 (
> + IN UINTN Address,
> + IN UINT32 Mask,
> + IN UINT32 Value
> + );
> +
> +/**
> + Clear and set a 64-bit MMIO register in Big Endian format.
> +
> + Mask the 64-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 64-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioClearSetBe64 (
> + IN UINTN Address,
> + IN UINT64 Mask,
> + IN UINT64 Value
> + );
> +
> +/**
> + Set a 8-bit MMIO register in Big Endian format.
> +
> + Set bits of the 8-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 8-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioSetBits8 (
> + IN UINTN Address,
> + IN UINT8 Bits
> + );
> +
> +/**
> + Set a 16-bit MMIO register in Big Endian format.
> +
> + Set bits of the 16-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioSetBitsBe16 (
> + IN UINTN Address,
> + IN UINT16 Bits
> + );
> +
> +/**
> + Set a 32-bit MMIO register in Big Endian format.
> +
> + Set bits of the 32-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioSetBitsBe32 (
> + IN UINTN Address,
> + IN UINT32 Bits
> + );
> +
> +/**
> + Set a 64-bit MMIO register in Big Endian format.
> +
> + Set bits of the 64-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioSetBitsBe64 (
> + IN UINTN Address,
> + IN UINT64 Bits
> + );
> +
> +/**
> + Clear bits of the 8-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 8-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioClearBits8 (
> + IN UINTN Address,
> + IN UINT8 Mask
> + );
> +
> +/**
> + Clear bits of the 16-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioClearBitsBe16 (
> + IN UINTN Address,
> + IN UINT16 Mask
> + );
> +
> +/**
> + Clear bits of the 32-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioClearBitsBe32 (
> + IN UINTN Address,
> + IN UINT32 Mask
> + );
> +
> +/**
> + Clear bits of the 64-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioClearBitsBe64 (
> + IN UINTN Address,
> + IN UINT64 Mask
> + );
>
> #endif
>
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> index b9f4c5e..f2179d1 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> @@ -19,6 +19,26 @@
> //
> #include "BaseIoLibIntrinsicInternal.h"
>
> +
> +#define Uswap16(X) \
> + ((((X) & 0xff00) >> 8) | \
> + (((X) & 0x00ff) << 8))
> +#define Uswap32(X) \
> + ((((X) & 0xff000000) >> 24) | \
> + (((X) & 0x00ff0000) >> 8) | \
> + (((X) & 0x0000ff00) << 8) | \
> + (((X) & 0x000000ff) << 24))
> +#define Uswap64(X) \
> + ((((X) & 0xff00000000000000) >> 56) | \
> + (((X) & 0x00ff000000000000) >> 40) | \
> + (((X) & 0x0000ff0000000000) >> 24) | \
> + (((X) & 0x000000ff00000000) >> 8) | \
> + (((X) & 0x00000000ff000000) << 8) | \
> + (((X) & 0x0000000000ff0000) << 24) | \
> + (((X) & 0x000000000000ff00) << 40) | \
> + (((X) & 0x00000000000000ff) << 56))
> +
> +
> /**
> Reads an 8-bit I/O port.
>
> @@ -428,3 +448,462 @@ MmioWrite64 (
> return Value;
> }
>
> +
> +/**
> + Reads a 16-bit MMIO register in Big Endian format.
> +
> + Reads the 16-bit MMIO register specified by Address. The 16-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioReadBe16 (
> + IN UINTN Address
> + )
> +{
> + UINT16 Value;
> +
> + ASSERT ((Address & 1) == 0);
> + Value = *(volatile UINT16*)Address;
> + return Uswap16(Value);
> +}
> +
> +/**
> + Writes a 16-bit MMIO register in Big Endian format.
> +
> + Writes the 16-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioWriteBe16 (
> + IN UINTN Address,
> + IN UINT16 Value
> + )
> +{
> + ASSERT ((Address & 1) == 0);
> + *(volatile UINT16*)Address = Uswap16(Value);
> + return Value;
> +}
> +
> +/**
> + Reads a 32-bit MMIO register in Big Endian format.
> +
> + Reads the 32-bit MMIO register specified by Address. The 32-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioReadBe32 (
> + IN UINTN Address
> + )
> +{
> + UINT32 Value;
> +
> + ASSERT ((Address & 3) == 0);
> + Value = *(volatile UINT32*)Address;
> + return Uswap32(Value);
> +}
> +
> +/**
> + Writes a 32-bit MMIO register in Big Endian format.
> +
> + Writes the 32-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioWriteBe32 (
> + IN UINTN Address,
> + IN UINT32 Value
> + )
> +{
> + ASSERT ((Address & 3) == 0);
> + *(volatile UINT32*)Address = Uswap32(Value);
> + return Value;
> +}
> +
> +/**
> + Reads a 64-bit MMIO register in Big Endian format.
> +
> + Reads the 64-bit MMIO register specified by Address. The 64-bit read value
> is
> + returned. This function must guarantee that all MMIO read and write
> + operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioReadBe64 (
> + IN UINTN Address
> + )
> +{
> + UINT64 Value;
> +
> + ASSERT ((Address & 7) == 0);
> + Value = *(volatile UINT64*)Address;
> + return Uswap64(Value);
> +}
> +
> +/**
> + Writes a 64-bit MMIO register in Big Endian format.
> +
> + Writes the 64-bit MMIO register specified by Address with the value
> specified
> + by Value and returns Value. This function must guarantee that all MMIO
> read
> + and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioWriteBe64 (
> + IN UINTN Address,
> + IN UINT64 Value
> + )
> +{
> + ASSERT ((Address & 7) == 0);
> + *(volatile UINT64*)Address = Uswap64(Value);
> + return Value;
> +}
> +
> +/**
> + Clear and set a 8-bit MMIO register.
> +
> + Mask the 8-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 8-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioClearSet8 (
> + IN UINTN Address,
> + IN UINT8 Mask,
> + IN UINT8 Value
> + )
> +{
> + *(volatile UINT8*)Address = (*(volatile UINT8*)Address & ~Mask) | Value;
> + return *(volatile UINT8*)Address;
> +}
> +
> +/**
> + Clear and set a 16-bit MMIO register in Big Endian format.
> +
> + Mask the 16-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 16-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioClearSetBe16 (
> + IN UINTN Address,
> + IN UINT16 Mask,
> + IN UINT16 Value
> + )
> +{
> + ASSERT ((Address & 1) == 0);
> + *(volatile UINT16*)Address = (*(volatile UINT16*)Address &
> Uswap16(~Mask))
> + |
> Uswap16(Value);
> + return *(volatile UINT16*)Address;
> +}
> +
> +/**
> + Clear and set a 32-bit MMIO register in Big Endian format.
> +
> + Mask the 32-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 32-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioClearSetBe32 (
> + IN UINTN Address,
> + IN UINT32 Mask,
> + IN UINT32 Value
> + )
> +{
> + ASSERT ((Address & 3) == 0);
> + *(volatile UINT32*)Address = (*(volatile UINT32*)Address &
> Uswap32(~Mask))
> + |
> Uswap32(Value);
> + return *(volatile UINT32*)Address;
> +}
> +
> +/**
> + Clear and set a 64-bit MMIO register in Big Endian format.
> +
> + Mask the 64-bit MMIO register specified by Address with the mask
> specified
> + by Mask and then Writes the 64-bit MMIO register specified by Address
> with
> + the value specified by Value and returns current value on register. This
> + function must guarantee that all MMIO read and write operations are
> serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Mask to clear the MMIO register.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioClearSetBe64 (
> + IN UINTN Address,
> + IN UINT64 Mask,
> + IN UINT64 Value
> + )
> +{
> + ASSERT ((Address & 7) == 0);
> + *(volatile UINT64*)Address = (*(volatile UINT64*)Address &
> Uswap64(~Mask))
> + |
> Uswap64(Value);
> + return *(volatile UINT64*)Address;
> +}
> +
> +/**
> + Set a 8-bit MMIO register in Big Endian format.
> +
> + Set bits of the 8-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 8-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioSetBits8 (
> + IN UINTN Address,
> + IN UINT8 Bits
> + )
> +{
> + *(volatile UINT8*)Address = *(volatile UINT8*)Address | Bits;
> + return *(volatile UINT8*)Address;
> +}
> +
> +/**
> + Set a 16-bit MMIO register in Big Endian format.
> +
> + Set bits of the 16-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioSetBitsBe16 (
> + IN UINTN Address,
> + IN UINT16 Bits
> + )
> +{
> + ASSERT ((Address & 1) == 0);
> + *(volatile UINT16*)Address = *(volatile UINT16*)Address | Uswap16(Bits);
> + return *(volatile UINT16*)Address;
> +}
> +
> +/**
> + Set a 32-bit MMIO register in Big Endian format.
> +
> + Set bits of the 32-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioSetBitsBe32 (
> + IN UINTN Address,
> + IN UINT32 Bits
> + )
> +{
> + ASSERT ((Address & 3) == 0);
> + *(volatile UINT32*)Address = *(volatile UINT32*)Address | Uswap32(Bits);
> + return *(volatile UINT32*)Address;
> +}
> +
> +/**
> + Set a 64-bit MMIO register in Big Endian format.
> +
> + Set bits of the 64-bit MMIO register specified by Address with the Bits
> + specified by Bits and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Bits The Bits to set in MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioSetBitsBe64 (
> + IN UINTN Address,
> + IN UINT64 Bits
> + )
> +{
> + ASSERT ((Address & 7) == 0);
> + *(volatile UINT64*)Address = *(volatile UINT64*)Address | Uswap64(Bits);
> + return *(volatile UINT64*)Address;
> +}
> +
> +/**
> + Clear bits of the 8-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 8-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT8
> +EFIAPI
> +MmioClearBits8 (
> + IN UINTN Address,
> + IN UINT8 Mask
> + )
> +{
> + *(volatile UINT8*)Address = *(volatile UINT8*)Address & (~Mask);
> + return *(volatile UINT8*)Address;
> +}
> +
> +/**
> + Clear bits of the 16-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 16-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +MmioClearBitsBe16 (
> + IN UINTN Address,
> + IN UINT16 Mask
> + )
> +{
> + ASSERT ((Address & 1) == 0);
> + *(volatile UINT16*)Address = *(volatile UINT16*)Address &
> Uswap16(~Mask);
> + return *(volatile UINT16*)Address;
> +}
> +
> +/**
> + Clear bits of the 32-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 32-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +MmioClearBitsBe32 (
> + IN UINTN Address,
> + IN UINT32 Mask
> + )
> +{
> + ASSERT ((Address & 3) == 0);
> + *(volatile UINT32*)Address = *(volatile UINT32*)Address &
> Uswap32(~Mask);
> + return *(volatile UINT32*)Address;
> +}
> +
> +/**
> + Clear bits of the 64-bit MMIO register specified by Address with the Mask
> + specified by Mask and returns register content. This function must
> + guarantee that all MMIO read and write operations are serialized.
> +
> + If 64-bit MMIO register operations are not supported, then ASSERT().
> +
> + @param Address The MMIO register to write.
> + @param Mask The Bits to clear in MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +MmioClearBitsBe64 (
> + IN UINTN Address,
> + IN UINT64 Mask
> + )
> +{
> + ASSERT ((Address & 7) == 0);
> + *(volatile UINT64*)Address = *(volatile UINT64*)Address &
> Uswap64(~Mask);
> + return *(volatile UINT64*)Address;
> +}
> --
> 1.9.1
>
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
next prev parent reply other threads:[~2016-10-17 3:10 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-14 9:33 [PATCH 1/1] MdePkg/IoLib: Add support for big-endian MMIO Bhupesh Sharma
2016-10-14 12:06 ` Laszlo Ersek
2016-10-14 13:17 ` Bhupesh Sharma
2016-10-14 13:32 ` Laszlo Ersek
2016-10-17 3:10 ` Gao, Liming [this message]
2016-10-17 4:10 ` Kinney, Michael D
2016-10-17 7:42 ` Ard Biesheuvel
2016-10-17 9:57 ` Bhupesh Sharma
2017-10-13 6:07 ` Meenakshi Aggarwal
2017-10-16 3:17 ` Gao, Liming
2017-10-23 7:07 ` Udit Kumar
2017-11-27 6:06 ` Meenakshi Aggarwal
2017-11-27 11:07 ` Leif Lindholm
2017-11-29 12:51 ` Leif Lindholm
2017-11-29 19:25 ` Kinney, Michael D
2017-11-29 19:48 ` Leif Lindholm
2017-11-30 4:15 ` Meenakshi Aggarwal
2017-12-01 10:57 ` Leif Lindholm
2017-12-01 17:57 ` Udit Kumar
2017-12-01 22:41 ` Kinney, Michael D
2017-12-04 6:18 ` Meenakshi Aggarwal
2017-12-04 12:36 ` Leif Lindholm
2017-12-04 15:31 ` Kinney, Michael D
2017-12-04 15:54 ` Leif Lindholm
2017-12-04 16:19 ` Kinney, Michael D
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