From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 780AE820E2 for ; Sun, 11 Dec 2016 17:48:37 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP; 11 Dec 2016 17:48:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,334,1477983600"; d="scan'208";a="16789808" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga002.jf.intel.com with ESMTP; 11 Dec 2016 17:48:36 -0800 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Sun, 11 Dec 2016 17:48:36 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.248.2; Sun, 11 Dec 2016 17:48:36 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.9]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.11]) with mapi id 14.03.0248.002; Mon, 12 Dec 2016 09:48:34 +0800 From: "Gao, Liming" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" Thread-Topic: [edk2] [Patch 1/2] MdeModulePkg SmmIpl: Fill Smram range for SMM driver when LMFA enable Thread-Index: AQHSS58qlWmHcD8MpkaXAQomIoAWyKD+7j6AgASuLIA= Date: Mon, 12 Dec 2016 01:48:33 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D69F002@SHSMSX104.ccr.corp.intel.com> References: <1480574974-22276-1-git-send-email-liming.gao@intel.com> <1480574974-22276-2-git-send-email-liming.gao@intel.com> <228150f0-f389-b2bc-df5e-e97c42b6ab42@intel.com> In-Reply-To: <228150f0-f389-b2bc-df5e-e97c42b6ab42@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 1/2] MdeModulePkg SmmIpl: Fill Smram range for SMM driver when LMFA enable X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Dec 2016 01:48:37 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Agree. Thanks! > -----Original Message----- > From: Zeng, Star > Sent: Friday, December 09, 2016 6:20 PM > To: Gao, Liming ; edk2-devel@lists.01.org > Cc: Yao, Jiewen ; Zeng, Star > Subject: Re: [edk2] [Patch 1/2] MdeModulePkg SmmIpl: Fill Smram range for > SMM driver when LMFA enable >=20 > Liming, >=20 > A small comment added inline. > With that update, Reviewed-by: Star Zeng to this > patch series. >=20 > On 2016/12/1 14:49, Liming Gao wrote: > > Allocate the additional Smram range to describe the reserved smram for > > SMM core and driver when LMFA feature is enabled. > > > > Cc: Star Zeng > > Cc: Jiewen Yao > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Liming Gao > > --- > > MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c | 39 > +++++++++++++++++++++++++++++----- > > 1 file changed, 34 insertions(+), 5 deletions(-) > > > > diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c > b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c > > index 18bec84..fd7027d 100644 > > --- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c > > +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c > > @@ -973,6 +973,10 @@ ExecuteSmmCoreFromSmram ( > > // Since the memory range to load SMM CORE will be cut out in SM= M > core, so no need to allocate and free this range > > // > > PageCount =3D 0; > > + // > > + // Reserved Smram Region for SmmCore is not used, and remove it > from SmramRangeCount. > > + // > > + gSmmCorePrivate->SmramRangeCount --; > > } else { > > DEBUG ((EFI_D_INFO, "LOADING MODULE FIXED ERROR: Loading > module at fixed address at address failed\n")); > > // > > @@ -1299,6 +1303,7 @@ GetFullSmramRanges ( > > UINTN Index2; > > EFI_SMRAM_DESCRIPTOR *FullSmramRanges; > > UINTN TempSmramRangeCount; > > + UINTN AdditionSmramRangeCount; > > EFI_SMRAM_DESCRIPTOR *TempSmramRanges; > > UINTN SmramRangeCount; > > EFI_SMRAM_DESCRIPTOR *SmramRanges; > > @@ -1332,12 +1337,23 @@ GetFullSmramRanges ( > > } > > } > > > > + // > > + // Reserve one entry for SMM Core in the full SMRAM ranges. >=20 > You have moved comment "Reserve one entry for SMM Core in the full > SMRAM > ranges." to here. >=20 > > + // > > + AdditionSmramRangeCount =3D 1; > > + if (PcdGet64(PcdLoadModuleAtFixAddressEnable) !=3D 0) { > > + // > > + // Reserve two entries for all SMM drivers and SMM Core in the ful= l > SMRAM ranges. > > + // > > + AdditionSmramRangeCount =3D 2; > > + } > > + > > if (SmramReservedCount =3D=3D 0) { > > // > > // No reserved SMRAM entry from SMM Configuration Protocol. > > // Reserve one entry for SMM Core in the full SMRAM ranges. >=20 > Since you have move comment "Reserve one entry for SMM Core in the full > SMRAM ranges." to the code above, how about remove it in this comments? >=20 > Thanks, > Star >=20 > > // > > - *FullSmramRangeCount =3D SmramRangeCount + 1; > > + *FullSmramRangeCount =3D SmramRangeCount + > AdditionSmramRangeCount; > > Size =3D (*FullSmramRangeCount) * sizeof (EFI_SMRAM_DESCRIPTOR); > > FullSmramRanges =3D (EFI_SMRAM_DESCRIPTOR *) AllocateZeroPool > (Size); > > ASSERT (FullSmramRanges !=3D NULL); > > @@ -1449,10 +1465,9 @@ GetFullSmramRanges ( > > ASSERT (TempSmramRangeCount <=3D MaxCount); > > > > // > > - // Sort the entries, > > - // and reserve one entry for SMM Core in the full SMRAM ranges. > > + // Sort the entries > > // > > - FullSmramRanges =3D AllocateZeroPool ((TempSmramRangeCount + 1) * > sizeof (EFI_SMRAM_DESCRIPTOR)); > > + FullSmramRanges =3D AllocateZeroPool ((TempSmramRangeCount + > AdditionSmramRangeCount) * sizeof (EFI_SMRAM_DESCRIPTOR)); > > ASSERT (FullSmramRanges !=3D NULL); > > *FullSmramRangeCount =3D 0; > > do { > > @@ -1472,7 +1487,7 @@ GetFullSmramRanges ( > > TempSmramRanges[Index].PhysicalSize =3D 0; > > } while (*FullSmramRangeCount < TempSmramRangeCount); > > ASSERT (*FullSmramRangeCount =3D=3D TempSmramRangeCount); > > - *FullSmramRangeCount +=3D 1; > > + *FullSmramRangeCount +=3D AdditionSmramRangeCount; > > > > FreePool (SmramRanges); > > FreePool (SmramReservedRanges); > > @@ -1510,6 +1525,7 @@ SmmIplEntry ( > > EFI_LOAD_FIXED_ADDRESS_CONFIGURATION_TABLE > *LMFAConfigurationTable; > > EFI_CPU_ARCH_PROTOCOL *CpuArch; > > EFI_STATUS SetAttrStatus; > > + EFI_SMRAM_DESCRIPTOR *SmramRangeSmmDriver; > > > > // > > // Fill in the image handle of the SMM IPL so the SMM Core can use t= his as > the > > @@ -1619,6 +1635,19 @@ SmmIplEntry ( > > // > > DEBUG ((EFI_D_INFO, "LOADING MODULE FIXED INFO: TSEG BASE > is %x. \n", LMFAConfigurationTable->SmramBase)); > > } > > + > > + // > > + // Fill the Smram range for all SMM code > > + // > > + SmramRangeSmmDriver =3D &gSmmCorePrivate- > >SmramRanges[gSmmCorePrivate->SmramRangeCount - 2]; > > + SmramRangeSmmDriver->CpuStart =3D mCurrentSmramRange- > >CpuStart; > > + SmramRangeSmmDriver->PhysicalStart =3D mCurrentSmramRange- > >PhysicalStart; > > + SmramRangeSmmDriver->RegionState =3D mCurrentSmramRange- > >RegionState | EFI_ALLOCATED; > > + SmramRangeSmmDriver->PhysicalSize =3D SmmCodeSize; > > + > > + mCurrentSmramRange->PhysicalSize -=3D SmmCodeSize; > > + mCurrentSmramRange->CpuStart =3D mCurrentSmramRange- > >CpuStart + SmmCodeSize; > > + mCurrentSmramRange->PhysicalStart =3D mCurrentSmramRange- > >PhysicalStart + SmmCodeSize; > > } > > // > > // Load SMM Core into SMRAM and execute it from SMRAM > >