From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 707F581BF8 for ; Wed, 11 Jan 2017 17:22:16 -0800 (PST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP; 11 Jan 2017 17:22:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,347,1477983600"; d="scan'208";a="52841746" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga006.fm.intel.com with ESMTP; 11 Jan 2017 17:22:16 -0800 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 11 Jan 2017 17:22:16 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 11 Jan 2017 17:22:15 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX104.ccr.corp.intel.com ([10.239.4.70]) with mapi id 14.03.0248.002; Thu, 12 Jan 2017 09:22:13 +0800 From: "Gao, Liming" To: "Duran, Leo" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" , "Justen, Jordan L" , "Singh, Brijesh" , "Fan, Jeff" , "lersek@redhat.com" Thread-Topic: [edk2] [PATCH 0/8] IoLib class library Thread-Index: AQHSa50iC7Ys/qgCT0SH1GFmweqAHaEydEvQ//+mToCAAIwvIIAAS4kAgAEYtaA= Date: Thu, 12 Jan 2017 01:22:13 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D6CD8F6@shsmsx102.ccr.corp.intel.com> References: <1484092554-26224-1-git-send-email-leo.duran@amd.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14D6CCE7E@shsmsx102.ccr.corp.intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14D6CD269@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 0/8] IoLib class library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jan 2017 01:22:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Leo: CpuIo2Dxe supports FifoIo operation, because original logic includes Fifo= Io implementation. CpuIoCheckParameter() checks the parameter, doesn't perf= ormance operation. And, 64bit IO operation is not supported. You add three = APIs for 8, 16 and 32 Io operation. So, there is no lose functionality. Las= t, OperationWidth =3D (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); It still = supports all Width.=20 Besides, I understand your work scope for IO library update. You can focus= on my comment 1. If you have no bandwidth, you can submit bugzillar for co= mment 2 to update PeiCpuIo and DxeCpuIo driver to base on IoLib to implemen= t FifoIo APIs. =20 Thanks Liming -----Original Message----- From: Duran, Leo [mailto:leo.duran@amd.com]=20 Sent: Thursday, January 12, 2017 12:29 AM To: Gao, Liming ; edk2-devel@lists.01.org Cc: Kinney, Michael D ; Justen, Jordan L ; Singh, Brijesh ; Fan, Jeff ; lersek@redhat.com Subject: RE: [edk2] [PATCH 0/8] IoLib class library Liming, However, here are some issues with trying to use Fifo types via the I/O pro= tocol: 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types= : // // For FIFO type, the target address won't increase during the access, // so treat Count as 1 // if (Width >=3D EfiCpuIoWidthFifoUint8 && Width <=3D EfiCpuIoWidthFifoUint= 64) { Count =3D 1; } 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are eliminated/truncated: // // Check to see if Width is in the valid range for I/O Port operations // Width =3D (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); if (!MmioOperation && (Width =3D=3D EfiCpuIoWidthUint64)) { return EFI_INVALID_PARAMETER; } 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite(): OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8, EfiCpu= IoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not serviced. > -----Original Message----- > From: Gao, Liming [mailto:liming.gao@intel.com] > Sent: Tuesday, January 10, 2017 10:07 PM > To: Duran, Leo ; edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Justen, Jordan L > ; Singh, Brijesh ; Fan, > Jeff ; lersek@redhat.com > Subject: RE: [edk2] [PATCH 0/8] IoLib class library >=20 > Leo: > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2 library > instance IoReadFifo8() implementation can call mCpuIo->Io.Read (mCpuIo, > EfiCpuIoWidthFifoUint8, Port, Count, Buffer); >=20 > Thanks > Liming > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Duran, Leo > Sent: Wednesday, January 11, 2017 11:37 AM > To: Gao, Liming ; edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Justen, Jordan L > ; Singh, Brijesh ; Fan, > Jeff ; lersek@redhat.com > Subject: Re: [edk2] [PATCH 0/8] IoLib class library >=20 > Liming... >=20 > > -----Original Message----- > > From: Gao, Liming [mailto:liming.gao@intel.com] > > Sent: Tuesday, January 10, 2017 7:42 PM > > To: Duran, Leo ; edk2-devel@lists.01.org > > Cc: Singh, Brijesh ; Justen, Jordan L > > ; Kinney, Michael D > > ; lersek@redhat.com; Fan, Jeff > > > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library > > > > Leo: > > Thanks for your update. Here is my comments. > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base > > on CPU IO service to do FifoIo operation. They don't implement them > again. > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver > can > > be updated to base on FifoIo API for their FifoIo implementation. >=20 > [Duran, Leo] I actually considered that, but the CPU I/O driver does not > provide FiFiIo service in its implementation of the EFI_CPU_IO2_PROTOCOL. > The CPU I/O driver does use the Fifo routines internally, and it does so = when > that caller request IoRead/IoWrite... see the CPU I/O service routines be= low. >=20 > > 3) One coding style issue. We don't assign value to the variable declar= ation. > > UINT8 *Buffer8 =3D (UINT8 *)Buffer; > > =3D=3D> > > UINT8 *Buffer8; > > Buffer8 =3D (UINT8 *)Buffer; >=20 > [Duran, Leo] OK, I'll change that. >=20 > > > > Thanks > > Liming > [Duran, Leo] >=20 > EFI_STATUS > EFIAPI > CpuIoServiceRead ( > IN EFI_CPU_IO2_PROTOCOL *This, > IN EFI_CPU_IO_PROTOCOL_WIDTH Width, > IN UINT64 Address, > IN UINTN Count, > OUT VOID *Buffer > ) > { > EFI_STATUS Status; > UINT8 InStride; > UINT8 OutStride; > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; > UINT8 *Uint8Buffer; >=20 > Status =3D CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer); > if (EFI_ERROR (Status)) { > return Status; > } >=20 > // > // Select loop based on the width of the transfer > // > InStride =3D mInStride[Width]; > OutStride =3D mOutStride[Width]; > OperationWidth =3D (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); >=20 > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > if (InStride =3D=3D 0) { > switch (OperationWidth) { > case EfiCpuIoWidthUint8: > IoReadFifo8 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > case EfiCpuIoWidthUint16: > IoReadFifo16 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > case EfiCpuIoWidthUint32: > IoReadFifo32 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > default: > // > // The CpuIoCheckParameter call above will ensure that this > // path is not taken. > // > ASSERT (FALSE); > break; > } > } > #endif >=20 > for (Uint8Buffer =3D Buffer; Count > 0; Address +=3D InStride, Uint8Buf= fer +=3D > OutStride, Count--) { > if (OperationWidth =3D=3D EfiCpuIoWidthUint8) { > *Uint8Buffer =3D IoRead8 ((UINTN)Address); > } else if (OperationWidth =3D=3D EfiCpuIoWidthUint16) { > *((UINT16 *)Uint8Buffer) =3D IoRead16 ((UINTN)Address); > } else if (OperationWidth =3D=3D EfiCpuIoWidthUint32) { > *((UINT32 *)Uint8Buffer) =3D IoRead32 ((UINTN)Address); > } > } >=20 > return EFI_SUCCESS; > } >=20 > EFI_STATUS > EFIAPI > CpuIoServiceWrite ( > IN EFI_CPU_IO2_PROTOCOL *This, > IN EFI_CPU_IO_PROTOCOL_WIDTH Width, > IN UINT64 Address, > IN UINTN Count, > IN VOID *Buffer > ) > { > EFI_STATUS Status; > UINT8 InStride; > UINT8 OutStride; > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; > UINT8 *Uint8Buffer; >=20 > // > // Make sure the parameters are valid > // > Status =3D CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer); > if (EFI_ERROR (Status)) { > return Status; > } >=20 > // > // Select loop based on the width of the transfer > // > InStride =3D mInStride[Width]; > OutStride =3D mOutStride[Width]; > OperationWidth =3D (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); >=20 > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > if (InStride =3D=3D 0) { > switch (OperationWidth) { > case EfiCpuIoWidthUint8: > IoWriteFifo8 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > case EfiCpuIoWidthUint16: > IoWriteFifo16 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > case EfiCpuIoWidthUint32: > IoWriteFifo32 ((UINTN)Address, Count, Buffer); > return EFI_SUCCESS; > default: > // > // The CpuIoCheckParameter call above will ensure that this > // path is not taken. > // > ASSERT (FALSE); > break; > } > } > #endif >=20 > for (Uint8Buffer =3D (UINT8 *)Buffer; Count > 0; Address +=3D InStride, > Uint8Buffer +=3D OutStride, Count--) { > if (OperationWidth =3D=3D EfiCpuIoWidthUint8) { > IoWrite8 ((UINTN)Address, *Uint8Buffer); > } else if (OperationWidth =3D=3D EfiCpuIoWidthUint16) { > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer)); > } else if (OperationWidth =3D=3D EfiCpuIoWidthUint32) { > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); > } > } >=20 > return EFI_SUCCESS; > } > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Leo Duran > > Sent: Wednesday, January 11, 2017 7:56 AM > > To: edk2-devel@lists.01.org > > Cc: brijesh.singh@amd.com; Justen, Jordan L > > ; Gao, Liming ; Leo > > Duran ; Kinney, Michael D > > ; lersek@redhat.com; Fan, Jeff > > > > Subject: [edk2] [PATCH 0/8] IoLib class library > > > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have > > duplicate implementations of I/O Fifo routines. The patch series moves > > the I/O Fifo routines into the BaseIoLibIntrinsic library and expands > > the IoLib class to include the ported I/O Fifo routines. > > > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support > > IA32 and X64 natively, and other architectures are supported by simply > > looping through the basic IoRead/IoWrite routines as appropiate. > > > > The intent of this patch series is twofold: > > 1) Integrate I/O Fifo routines into the IoLib class library. > > 2) Allow override of IoLib as may be required to support specific > > hardware implementations, such as AMD's Secure Encrypted Virtualization > (SEV). > > > > Leo Duran (8): > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library > > > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203 > > +++++++++++++++++++++ > > MdePkg/Include/Library/IoLib.h | 158 +++++++++++++= +++ > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +- > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 + > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 + > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 > > ++++++++++++++++++ > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 > > ++++++++++++++++++ > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 > > ++++++++++++++++++++ > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 + > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 + > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203 > > +++++++++++++++++++++ > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203 > > +++++++++++++++++++++ > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203 > > +++++++++++++++++++++ > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203 > > +++++++++++++++++++++ > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------ > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +----- > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +- > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +- > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------ > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +- > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +- > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 -------------= ----- > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename > > {UefiCpuPkg/CpuIo2Dxe =3D> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename > > {UefiCpuPkg/CpuIo2Dxe =3D> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename > > {UefiCpuPkg/CpuIo2Dxe =3D> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename > > {UefiCpuPkg/CpuIo2Dxe =3D> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm > > delete mode 100644 > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h > > > > -- > > 1.9.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel