From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 848878220C for ; Mon, 20 Feb 2017 20:37:16 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2017 20:37:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,188,1484035200"; d="scan'208";a="936261090" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga003.jf.intel.com with ESMTP; 20 Feb 2017 20:37:15 -0800 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 20 Feb 2017 20:37:15 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 20 Feb 2017 20:37:15 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.204]) with mapi id 14.03.0248.002; Tue, 21 Feb 2017 12:37:12 +0800 From: "Gao, Liming" To: "Fan, Jeff" , "edk2-devel@ml01.01.org" CC: "Tian, Feng" , "Kinney, Michael D" Thread-Topic: [PATCH] UefiCpuPkg/ExceptionHandlerAsm.S: Fix code length issue with GCC 5.4 Thread-Index: AQHSi/MprsZ258kfVE678ByHcijLNaFy4GxA Date: Tue, 21 Feb 2017 04:37:11 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D6E1370@shsmsx102.ccr.corp.intel.com> References: <20170221033222.26496-1-jeff.fan@intel.com> In-Reply-To: <20170221033222.26496-1-jeff.fan@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/ExceptionHandlerAsm.S: Fix code length issue with GCC 5.4 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Feb 2017 04:37:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao >-----Original Message----- >From: Fan, Jeff >Sent: Tuesday, February 21, 2017 11:32 AM >To: edk2-devel@ml01.01.org >Cc: Gao, Liming ; Tian, Feng ; >Kinney, Michael D >Subject: [PATCH] UefiCpuPkg/ExceptionHandlerAsm.S: Fix code length issue >with GCC 5.4 > >X64\ExceptionHandlerAsm.S define MARCO to set up 32 IDT entries header. >It assume GCC compiler will generate the same code length on the following >instrction for each IDT entry. > jmp ASM_PFX(CommonInterruptEntry) > >It works with GCC 4.x. However, GCC 5.4 will generate different code size = of >IDT >entry code per the offset value from CommonInterruptEntry address. We >should use >DB to make sure each IDT entry header has the same size whatever compiler >version. > >.ASM and .nasm used the different solution and do not have this issue. > >https://bugzilla.tianocore.org/show_bug.cgi?id=3D389 > >Cc: Liming Gao >Cc: Feng Tian >Cc: Michael D Kinney >Contributed-under: TianoCore Contribution Agreement 1.0 >Signed-off-by: Jeff Fan >--- > UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S | >5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > >diff --git >a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S >b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S >index 6b62f09..975adaa 100644 >--- >a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S >+++ >b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S >@@ -1,5 +1,5 @@ > #------------------------------------------------------------------------= ------ ; >-# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.
>+# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
> # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the B= SD >License > # which accompanies this distribution. The full text of the license may = be >found at >@@ -36,7 +36,8 @@ ASM_GLOBAL ASM_PFX(CommonExceptionHandler) > .macro IDT_MACRO arg > push \arg > #endif >- jmp ASM_PFX(CommonInterruptEntry) >+ .byte 0xe9 # jmp ASM_PFX(CommonInterruptEntry) >+ .long ASM_PFX(CommonInterruptEntry) - . - 4 > .endm > > AsmIdtVectorBegin: >-- >2.9.3.windows.2