From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 557202095D2D9 for ; Mon, 10 Jul 2017 07:44:28 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jul 2017 07:46:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,340,1496127600"; d="scan'208";a="285074517" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga004.fm.intel.com with ESMTP; 10 Jul 2017 07:46:12 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 10 Jul 2017 07:46:11 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 10 Jul 2017 07:46:10 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.116]) with mapi id 14.03.0319.002; Mon, 10 Jul 2017 22:46:09 +0800 From: "Gao, Liming" To: Patrick Georgi , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH] BaseTools: Add COREBOOT tools definition Thread-Index: AQHS9NmBiLrmONE6+kOeCUB7i4f0ZaJNJ5Jg Date: Mon, 10 Jul 2017 14:46:08 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D753010@shsmsx102.ccr.corp.intel.com> References: <20170704152241.21177-1-pgeorgi@google.com> In-Reply-To: <20170704152241.21177-1-pgeorgi@google.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] BaseTools: Add COREBOOT tools definition X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Jul 2017 14:44:28 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Patrick: Compared GCC5 and COREBOOT, the difference is that GCC5_IA32_PREFIX and G= CC5_X64_PREFIX. CoreBoot tool chain has the different style. So, it can't r= euse GCC5 tool chain. If GCC5 is update to refer to ENV (GCC5_IA32_PREFIX) = and ENV (GCC5_X64_PREFIX) like ENV(GCC5_ARM_PREFIX) in CC_PATH, GCC5 can su= pport COREBOOT usage. For the future, the different FLAG can be appended in= [BuildOptions] of platform.dsc. So, I suggest to reuse GCC5 tool chain for= coreboot.=20 GCC5: DEFINE GCC5_IA32_PREFIX =3D ENV(GCC5_BIN) DEFINE GCC5_X64_PREFIX =3D ENV(GCC5_BIN) *_GCC5_*_*_DLL =3D ENV(GCC5_DLL) COREBOOT: DEFINE COREBOOT_IA32_PREFIX =3D DEF(COREBOOT_PREFIX)i386-elf- DEFINE COREBOOT_X64_PREFIX =3D DEF(COREBOOT_PREFIX)x86_64-elf- *_COREBOOT_*_*_DLL =3D ENV(COREBOOT_DLL) Thanks Liming > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Pa= trick Georgi > Sent: Tuesday, July 4, 2017 11:23 PM > To: edk2-devel@lists.01.org > Subject: [edk2] [PATCH] BaseTools: Add COREBOOT tools definition >=20 > That toolset is defined as the current coreboot toolchain[0] at commit > time. Right now this is gcc 6.3, iasl and GNU make, with minor patches > as deemed necessary for firmware development by the coreboot maintainers. >=20 > COREBOOT is primarily supposed to build CorebootPayloadPkg (and its > dependencies), but should be suitable for other builds as well. > It's tested to build a usable Ovmf image. >=20 > For now, COREBOOT is a copy of the GCC5 rules, but it may diverge over > time. >=20 > [0] As built by https://review.coreboot.org/cgit/coreboot.git/tree/util/c= rossgcc >=20 > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Patrick Georgi > --- > BaseTools/Conf/tools_def.template | 181 ++++++++++++++++++++++++++++++++= ++++++ > 1 file changed, 181 insertions(+) >=20 > diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def= .template > index 65f21061e6..08adb32e38 100755 > --- a/BaseTools/Conf/tools_def.template > +++ b/BaseTools/Conf/tools_def.template > @@ -199,6 +199,12 @@ DEFINE GCC49_X64_PREFIX =3D ENV(GCC49_BIN) > DEFINE GCC5_IA32_PREFIX =3D ENV(GCC5_BIN) > DEFINE GCC5_X64_PREFIX =3D ENV(GCC5_BIN) >=20 > +DEFINE COREBOOT_PREFIX =3D ENV(COREBOOT_SDK_PATH) > +DEFINE COREBOOT_IA32_PREFIX =3D DEF(COREBOOT_PREFIX)i386-elf- > +DEFINE COREBOOT_X64_PREFIX =3D DEF(COREBOOT_PREFIX)x86_64-elf- > +DEFINE COREBOOT_ARM_PREFIX =3D DEF(COREBOOT_PREFIX)arm-eabi- > +DEFINE COREBOOT_AARCH64_PREFIX =3D DEF(COREBOOT_PREFIX)aarch64-elf- > + > DEFINE UNIX_IASL_BIN =3D ENV(IASL_PREFIX)iasl > DEFINE WIN_IASL_BIN =3D ENV(IASL_PREFIX)iasl.exe > DEFINE WIN_ASL_BIN =3D ENV(IASL_PREFIX)asl.exe > @@ -4493,6 +4499,28 @@ DEFINE GCC5_AARCH64_DLINK2_FLAGS =3D DEF(GCC49= _AARCH64_DLINK2_FLAGS) -Wno-erro > DEFINE GCC5_ARM_ASLDLINK_FLAGS =3D DEF(GCC49_ARM_ASLDLINK_FLAGS) > DEFINE GCC5_AARCH64_ASLDLINK_FLAGS =3D DEF(GCC49_AARCH64_ASLDLINK_FLAG= S) >=20 > +DEFINE COREBOOT_IA32_CC_FLAGS =3D DEF(GCC5_IA32_CC_FLAGS) > +DEFINE COREBOOT_X64_CC_FLAGS =3D DEF(GCC5_X64_CC_FLAGS) > +DEFINE COREBOOT_IA32_X64_DLINK_COMMON =3D DEF(GCC5_IA32_X64_DLINK_COM= MON) > +DEFINE COREBOOT_IA32_X64_ASLDLINK_FLAGS =3D DEF(GCC5_IA32_X64_ASLDLINK_= FLAGS) > +DEFINE COREBOOT_IA32_X64_DLINK_FLAGS =3D DEF(GCC5_IA32_X64_DLINK_FLA= GS) > +DEFINE COREBOOT_IA32_DLINK2_FLAGS =3D DEF(GCC5_IA32_DLINK2_FLAGS) > +DEFINE COREBOOT_X64_DLINK_FLAGS =3D DEF(GCC5_X64_DLINK_FLAGS) > +DEFINE COREBOOT_X64_DLINK2_FLAGS =3D DEF(GCC5_X64_DLINK2_FLAGS) > +DEFINE COREBOOT_ASM_FLAGS =3D DEF(GCC5_ASM_FLAGS) > +DEFINE COREBOOT_ARM_ASM_FLAGS =3D DEF(GCC5_ARM_ASM_FLAGS) > +DEFINE COREBOOT_AARCH64_ASM_FLAGS =3D DEF(GCC5_AARCH64_ASM_FLAGS) > +DEFINE COREBOOT_ARM_CC_FLAGS =3D DEF(GCC5_ARM_CC_FLAGS) > +DEFINE COREBOOT_ARM_CC_XIPFLAGS =3D DEF(GCC5_ARM_CC_XIPFLAGS) > +DEFINE COREBOOT_AARCH64_CC_FLAGS =3D DEF(GCC5_AARCH64_CC_FLAGS) > +DEFINE COREBOOT_AARCH64_CC_XIPFLAGS =3D DEF(GCC5_AARCH64_CC_XIPFLAG= S) > +DEFINE COREBOOT_ARM_DLINK_FLAGS =3D DEF(GCC5_ARM_DLINK_FLAGS) > +DEFINE COREBOOT_ARM_DLINK2_FLAGS =3D DEF(GCC5_ARM_DLINK2_FLAGS) > +DEFINE COREBOOT_AARCH64_DLINK_FLAGS =3D DEF(GCC5_AARCH64_DLINK_FLAG= S) > +DEFINE COREBOOT_AARCH64_DLINK2_FLAGS =3D DEF(GCC5_AARCH64_DLINK2_FLA= GS) > +DEFINE COREBOOT_ARM_ASLDLINK_FLAGS =3D DEF(GCC5_ARM_ASLDLINK_FLAGS= ) > +DEFINE COREBOOT_AARCH64_ASLDLINK_FLAGS =3D DEF(GCC5_AARCH64_ASLDLINK_F= LAGS) > + > ########################################################################= ############ > # > # Unix GCC And Intel Linux ACPI Compiler > @@ -5413,6 +5441,159 @@ RELEASE_GCC5_AARCH64_DLINK_FLAGS =3D DEF(GCC5_AAR= CH64_DLINK_FLAGS) -flto -Os -L$(W > NOOPT_GCC5_AARCH64_DLINK_FLAGS =3D DEF(GCC5_AARCH64_DLINK_FLAGS) -z co= mmon-page-size=3D0x1000 -O0 > NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 -O0 >=20 > +########################################################################= ############ > +# > +# COREBOOT - This configuration is used to compile under Linux to produc= e > +# PE/COFF binaries using coreboot's toolchain > +# > +########################################################################= ############ > +*_COREBOOT_*_*_FAMILY =3D GCC > + > +*_COREBOOT_*_MAKE_PATH =3D DEF(COREBOOT_PREFIX)make > +*_COREBOOT_*_*_DLL =3D ENV(COREBOOT_DLL) > +*_COREBOOT_*_ASL_PATH =3D DEF(COREBOOT_PREFIX)iasl > + > +*_COREBOOT_*_PP_FLAGS =3D DEF(GCC_PP_FLAGS) > +*_COREBOOT_*_ASLPP_FLAGS =3D DEF(GCC_ASLPP_FLAGS) > +*_COREBOOT_*_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) > +*_COREBOOT_*_VFRPP_FLAGS =3D DEF(GCC_VFRPP_FLAGS) > +*_COREBOOT_*_APP_FLAGS =3D > +*_COREBOOT_*_ASL_FLAGS =3D DEF(IASL_FLAGS) > +*_COREBOOT_*_ASL_OUTFLAGS =3D DEF(IASL_OUTFLAGS) > + > +################## > +# COREBOOT IA32 definitions > +################## > +*_COREBOOT_IA32_OBJCOPY_PATH =3D DEF(COREBOOT_IA32_PREFIX)objcop= y > +*_COREBOOT_IA32_CC_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_SLINK_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc-ar > +*_COREBOOT_IA32_DLINK_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_ASLDLINK_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_ASM_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_PP_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_VFRPP_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_ASLCC_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_ASLPP_PATH =3D DEF(COREBOOT_IA32_PREFIX)gcc > +*_COREBOOT_IA32_RC_PATH =3D DEF(COREBOOT_IA32_PREFIX)objcop= y > + > +*_COREBOOT_IA32_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m32 -fno-= lto > +*_COREBOOT_IA32_ASLDLINK_FLAGS =3D DEF(COREBOOT_IA32_X64_ASLDLINK_= FLAGS) -Wl,-m,elf_i386 > +*_COREBOOT_IA32_ASM_FLAGS =3D DEF(COREBOOT_ASM_FLAGS) -m32 -m= arch=3Di386 > +*_COREBOOT_IA32_DLINK2_FLAGS =3D DEF(COREBOOT_IA32_DLINK2_FLAGS) > +*_COREBOOT_IA32_RC_FLAGS =3D DEF(GCC_IA32_RC_FLAGS) > +*_COREBOOT_IA32_OBJCOPY_FLAGS =3D > +*_COREBOOT_IA32_NASM_FLAGS =3D -f elf32 > + > + DEBUG_COREBOOT_IA32_CC_FLAGS =3D DEF(COREBOOT_IA32_CC_FLAGS) -fl= to -Os > + DEBUG_COREBOOT_IA32_DLINK_FLAGS =3D DEF(COREBOOT_IA32_X64_DLINK_FLA= GS) -flto -Os > -Wl,-m,elf_i386,--oformat=3Delf32-i386 > + > +RELEASE_COREBOOT_IA32_CC_FLAGS =3D DEF(COREBOOT_IA32_CC_FLAGS) -fl= to -Os -Wno-unused-but-set-variable > +RELEASE_COREBOOT_IA32_DLINK_FLAGS =3D DEF(COREBOOT_IA32_X64_DLINK_FLA= GS) -flto -Os > -Wl,-m,elf_i386,--oformat=3Delf32-i386 > + > + NOOPT_COREBOOT_IA32_CC_FLAGS =3D DEF(COREBOOT_IA32_CC_FLAGS) -O0 > + NOOPT_COREBOOT_IA32_DLINK_FLAGS =3D DEF(COREBOOT_IA32_X64_DLINK_FLA= GS) -Wl,-m,elf_i386,--oformat=3Delf32-i386 > -O0 > + > +################## > +# COREBOOT X64 definitions > +################## > +*_COREBOOT_X64_OBJCOPY_PATH =3D DEF(COREBOOT_X64_PREFIX)objcopy > +*_COREBOOT_X64_CC_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_SLINK_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc-ar > +*_COREBOOT_X64_DLINK_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_ASLDLINK_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_ASM_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_PP_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_VFRPP_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_ASLCC_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_ASLPP_PATH =3D DEF(COREBOOT_X64_PREFIX)gcc > +*_COREBOOT_X64_RC_PATH =3D DEF(COREBOOT_X64_PREFIX)objcopy > + > +*_COREBOOT_X64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m64 -fno-= lto > +*_COREBOOT_X64_ASLDLINK_FLAGS =3D DEF(COREBOOT_IA32_X64_ASLDLINK_= FLAGS) -Wl,-m,elf_x86_64 > +*_COREBOOT_X64_ASM_FLAGS =3D DEF(COREBOOT_ASM_FLAGS) -m64 > +*_COREBOOT_X64_DLINK2_FLAGS =3D DEF(COREBOOT_X64_DLINK2_FLAGS) > +*_COREBOOT_X64_RC_FLAGS =3D DEF(GCC_X64_RC_FLAGS) > +*_COREBOOT_X64_OBJCOPY_FLAGS =3D > +*_COREBOOT_X64_NASM_FLAGS =3D -f elf64 > + > + DEBUG_COREBOOT_X64_CC_FLAGS =3D DEF(COREBOOT_X64_CC_FLAGS) -flt= o -DUSING_LTO -Os > + DEBUG_COREBOOT_X64_DLINK_FLAGS =3D DEF(COREBOOT_X64_DLINK_FLAGS) -= flto -Os > + > +RELEASE_COREBOOT_X64_CC_FLAGS =3D DEF(COREBOOT_X64_CC_FLAGS) -flt= o -DUSING_LTO -Os > -Wno-unused-but-set-variable > +RELEASE_COREBOOT_X64_DLINK_FLAGS =3D DEF(COREBOOT_X64_DLINK_FLAGS) -= flto -Os > + > + NOOPT_COREBOOT_X64_CC_FLAGS =3D DEF(COREBOOT_X64_CC_FLAGS) -O0 > + NOOPT_COREBOOT_X64_DLINK_FLAGS =3D DEF(COREBOOT_X64_DLINK_FLAGS) -= O0 > + > +################## > +# COREBOOT ARM definitions > +################## > +*_COREBOOT_ARM_CC_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_SLINK_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc-ar > +*_COREBOOT_ARM_DLINK_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_ASLDLINK_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_ASM_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_PP_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_VFRPP_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_ASLCC_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_ASLPP_PATH =3D ENV(COREBOOT_ARM_PREFIX)gcc > +*_COREBOOT_ARM_RC_PATH =3D ENV(COREBOOT_ARM_PREFIX)objcopy > + > +*_COREBOOT_ARM_ARCHCC_FLAGS =3D -mthumb > +*_COREBOOT_ARM_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) > +*_COREBOOT_ARM_ASLDLINK_FLAGS =3D DEF(COREBOOT_ARM_ASLDLINK_FLAGS= ) > +*_COREBOOT_ARM_ASM_FLAGS =3D DEF(COREBOOT_ARM_ASM_FLAGS) > +*_COREBOOT_ARM_DLINK2_FLAGS =3D DEF(COREBOOT_ARM_DLINK2_FLAGS) > +*_COREBOOT_ARM_PLATFORM_FLAGS =3D -march=3Darmv7-a > +*_COREBOOT_ARM_PP_FLAGS =3D $(ARCHCC_FLAGS) $(PLATFORM_FLAG= S) DEF(GCC_PP_FLAGS) > +*_COREBOOT_ARM_RC_FLAGS =3D DEF(GCC_ARM_RC_FLAGS) > +*_COREBOOT_ARM_VFRPP_FLAGS =3D $(ARCHCC_FLAGS) $(PLATFORM_FLAG= S) DEF(GCC_VFRPP_FLAGS) > +*_COREBOOT_ARM_CC_XIPFLAGS =3D DEF(COREBOOT_ARM_CC_XIPFLAGS) > + > + DEBUG_COREBOOT_ARM_CC_FLAGS =3D DEF(COREBOOT_ARM_CC_FLAGS) -O0 > + DEBUG_COREBOOT_ARM_DLINK_FLAGS =3D DEF(COREBOOT_ARM_DLINK_FLAGS) > + > +RELEASE_COREBOOT_ARM_CC_FLAGS =3D DEF(COREBOOT_ARM_CC_FLAGS) -flt= o -Wno-unused-but-set-variable > +RELEASE_COREBOOT_ARM_DLINK_FLAGS =3D DEF(COREBOOT_ARM_DLINK_FLAGS) -= flto -Os > -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=3D-pass-th= rough=3D-llto-arm > + > + NOOPT_COREBOOT_ARM_CC_FLAGS =3D DEF(COREBOOT_ARM_CC_FLAGS) -O0 > + NOOPT_COREBOOT_ARM_DLINK_FLAGS =3D DEF(COREBOOT_ARM_DLINK_FLAGS) -= O0 > + > +################## > +# COREBOOT AARCH64 definitions > +################## > +*_COREBOOT_AARCH64_CC_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_SLINK_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc= -ar > +*_COREBOOT_AARCH64_DLINK_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_ASLDLINK_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_ASM_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_PP_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_VFRPP_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_ASLCC_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_ASLPP_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)gcc > +*_COREBOOT_AARCH64_RC_PATH =3D ENV(COREBOOT_AARCH64_PREFIX)obj= copy > + > +*_COREBOOT_AARCH64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) > +*_COREBOOT_AARCH64_ASLDLINK_FLAGS =3D DEF(COREBOOT_AARCH64_ASLDLINK_F= LAGS) > +*_COREBOOT_AARCH64_ASM_FLAGS =3D DEF(COREBOOT_AARCH64_ASM_FLAGS) > +*_COREBOOT_AARCH64_DLINK2_FLAGS =3D DEF(COREBOOT_AARCH64_DLINK2_FLA= GS) > +*_COREBOOT_AARCH64_PLATFORM_FLAGS =3D > +*_COREBOOT_AARCH64_PP_FLAGS =3D $(ARCHCC_FLAGS) $(PLATFORM_FLAG= S) DEF(GCC_PP_FLAGS) > +*_COREBOOT_AARCH64_RC_FLAGS =3D DEF(GCC_AARCH64_RC_FLAGS) > +*_COREBOOT_AARCH64_VFRPP_FLAGS =3D $(ARCHCC_FLAGS) $(PLATFORM_FLAG= S) DEF(GCC_VFRPP_FLAGS) > +*_COREBOOT_AARCH64_CC_XIPFLAGS =3D DEF(COREBOOT_AARCH64_CC_XIPFLAG= S) > + > + DEBUG_COREBOOT_AARCH64_CC_FLAGS =3D DEF(COREBOOT_AARCH64_CC_FLAGS) = -O0 -mcmodel=3Dsmall > + DEBUG_COREBOOT_AARCH64_DLINK_FLAGS =3D DEF(COREBOOT_AARCH64_DLINK_FLAG= S) -z common-page-size=3D0x1000 > + DEBUG_COREBOOT_AARCH64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 > + > +RELEASE_COREBOOT_AARCH64_CC_FLAGS =3D DEF(COREBOOT_AARCH64_CC_FLAGS) = -flto -Wno-unused-but-set-variable > -mcmodel=3Dtiny -fomit-frame-pointer > +RELEASE_COREBOOT_AARCH64_DLINK_FLAGS =3D DEF(COREBOOT_AARCH64_DLINK_FLAG= S) -flto -Os > -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=3D-pas= s-through=3D-llto-aarch64 -Wno-lto-type-mismatch > + > + NOOPT_COREBOOT_AARCH64_CC_FLAGS =3D DEF(COREBOOT_AARCH64_CC_FLAGS) = -O0 -mcmodel=3Dsmall > + NOOPT_COREBOOT_AARCH64_DLINK_FLAGS =3D DEF(COREBOOT_AARCH64_DLINK_FLAG= S) -z common-page-size=3D0x1000 -O0 > + NOOPT_COREBOOT_AARCH64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 -= O0 > + > ########################################################################= ############ > # > # CLANG35 - This configuration is used to compile under Linux to produ= ce > -- > 2.13.2.725.g09c95d1e9-goog >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel