From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8B99D21DF37AE for ; Wed, 2 Aug 2017 01:17:34 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Aug 2017 01:19:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,310,1498546800"; d="scan'208";a="114641782" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga004.jf.intel.com with ESMTP; 02 Aug 2017 01:19:44 -0700 Received: from fmsmsx157.amr.corp.intel.com (10.18.116.73) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 2 Aug 2017 01:19:44 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX157.amr.corp.intel.com (10.18.116.73) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 2 Aug 2017 01:19:43 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.122]) with mapi id 14.03.0319.002; Wed, 2 Aug 2017 16:19:39 +0800 From: "Gao, Liming" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Wu, Hao A" , "Fan, Jeff" Thread-Topic: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise operation Thread-Index: AQHTCzR8wbJgEEPK9kWkKiGZiwgpIKJwuajg Date: Wed, 2 Aug 2017 08:19:38 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D75E7DE@shsmsx102.ccr.corp.intel.com> References: <1501639799-46452-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1501639799-46452-1-git-send-email-star.zeng@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise operation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Aug 2017 08:17:34 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao >-----Original Message----- >From: Zeng, Star >Sent: Wednesday, August 02, 2017 10:10 AM >To: edk2-devel@lists.01.org >Cc: Zeng, Star ; Wu, Hao A ; Gao, >Liming ; Fan, Jeff >Subject: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in >bitwise operation > >It is introduced by 9e9ca2100f22be29f1a53129d741f4305ff34a71. > >Cc: Hao Wu >Cc: Liming Gao >Cc: Jeff Fan >Contributed-under: TianoCore Contribution Agreement 1.0 >Signed-off-by: Star Zeng >--- > UefiCpuPkg/SecCore/SecMain.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c >index e9e243ca0585..173bbfcfcba4 100644 >--- a/UefiCpuPkg/SecCore/SecMain.c >+++ b/UefiCpuPkg/SecCore/SecMain.c >@@ -281,7 +281,7 @@ SecStartupPhase2( > // will be built based on them in PEI phase. > // > SecCoreData->PeiTemporaryRamBase =3D (VOID *)(((UINTN)SecCoreData- >>PeiTemporaryRamBase + 7) & ~0x07); >- SecCoreData->PeiTemporaryRamSize &=3D ~0x07; >+ SecCoreData->PeiTemporaryRamSize &=3D ~(UINTN)0x07; > } else { > // > // No addition PPI, PpiList directly point to the common PPI list. >-- >2.7.0.windows.1