From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9F5B121DF806F for ; Mon, 28 Aug 2017 00:36:52 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Aug 2017 00:39:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,440,1498546800"; d="scan'208";a="1188778735" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 28 Aug 2017 00:39:20 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 28 Aug 2017 00:39:19 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 28 Aug 2017 00:39:19 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.39]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.219]) with mapi id 14.03.0319.002; Mon, 28 Aug 2017 15:39:18 +0800 From: "Gao, Liming" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH v2 0/5] Add multiple PCI segments configuration access support Thread-Index: AQHTHYBSzaURUWEDq0OygrymSumRBKKZZnzg Date: Mon, 28 Aug 2017 07:39:16 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14D781633@shsmsx102.ccr.corp.intel.com> References: <20170825085723.396044-1-ruiyu.ni@intel.com> In-Reply-To: <20170825085723.396044-1-ruiyu.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 0/5] Add multiple PCI segments configuration access support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Aug 2017 07:36:52 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao >-----Original Message----- >From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of >Ruiyu Ni >Sent: Friday, August 25, 2017 4:57 PM >To: edk2-devel@lists.01.org >Subject: [edk2] [PATCH v2 0/5] Add multiple PCI segments configuration >access support > >v2: Add missing function header and file header. Correct all incorrect fil= e >headers. > >Ruiyu Ni (5): > MdePkg/PciSegmentLib: Fix typo in function header comments > MdePkg/PciExpress: Add macro PCI_ECAM_ADDRESS > MdePkg/PciSegmentInfoLib: Add PciSegmentInfoLib class and instance. > MdePkg/PciSegmentLib: Add instances that consumes PciSegmentInfoLib > MdePkg/S3PciSegmentLib: Add S3PciSegmentLib class and instance. > > MdePkg/Include/IndustryStandard/PciExpress21.h | 19 +- > MdePkg/Include/Library/PciExpressLib.h | 5 +- > MdePkg/Include/Library/PciSegmentInfoLib.h | 41 ++ > MdePkg/Include/Library/PciSegmentLib.h | 102 ++-- > .../Library/{PciSegmentLib.h =3D> S3PciSegmentLib.h} | 364 ++++++----- > .../BasePciSegmentInfoLibNull.inf | 41 ++ > .../BasePciSegmentInfoLibNull.uni | 20 + > .../BasePciSegmentInfoLibNull/PciSegmentInfoLib.c | 38 ++ > .../Library/BasePciSegmentLibPci/PciSegmentLib.c | 136 +++-- > .../BaseS3PciSegmentLib/BaseS3PciSegmentLib.inf | 45 ++ > .../BaseS3PciSegmentLib/BaseS3PciSegmentLib.uni | 23 + > .../BaseS3PciSegmentLib/S3PciSegmentLib.c} | 674 ++++++++++++++--= --- >-- > .../PciSegmentLibSegmentInfo/BasePciSegmentLib.c | 71 +++ > .../BasePciSegmentLibSegmentInfo.inf | 46 ++ > .../BasePciSegmentLibSegmentInfo.uni | 21 + > .../DxeRuntimePciSegmentLib.c | 321 ++++++++++ > .../DxeRuntimePciSegmentLibSegmentInfo.inf | 55 ++ > .../DxeRuntimePciSegmentLibSegmentInfo.uni | 21 + > .../PciSegmentLibCommon.c} | 656 +++++++++++++++-= ---- > .../PciSegmentLibSegmentInfo/PciSegmentLibCommon.h | 57 ++ > .../PeiPciSegmentLibPciCfg2/PciSegmentLib.c | 187 +++--- > .../PciSegmentLib.c | 180 +++--- > MdePkg/MdePkg.dec | 8 + > MdePkg/MdePkg.dsc | 4 + > 24 files changed, 2250 insertions(+), 885 deletions(-) > create mode 100644 MdePkg/Include/Library/PciSegmentInfoLib.h > copy MdePkg/Include/Library/{PciSegmentLib.h =3D> S3PciSegmentLib.h} (80%= ) > create mode 100644 >MdePkg/Library/BasePciSegmentInfoLibNull/BasePciSegmentInfoLibNull.inf > create mode 100644 >MdePkg/Library/BasePciSegmentInfoLibNull/BasePciSegmentInfoLibNull.uni > create mode 100644 >MdePkg/Library/BasePciSegmentInfoLibNull/PciSegmentInfoLib.c > create mode 100644 >MdePkg/Library/BaseS3PciSegmentLib/BaseS3PciSegmentLib.inf > create mode 100644 >MdePkg/Library/BaseS3PciSegmentLib/BaseS3PciSegmentLib.uni > copy MdePkg/{Include/Library/PciSegmentLib.h =3D> >Library/BaseS3PciSegmentLib/S3PciSegmentLib.c} (66%) > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLib.c > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInf >o.inf > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInf >o.uni > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLibSeg >mentInfo.inf > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLibSeg >mentInfo.uni > copy MdePkg/{Include/Library/PciSegmentLib.h =3D> >Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c} (69%) > create mode 100644 >MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.h > >-- >2.12.2.windows.2 > >_______________________________________________ >edk2-devel mailing list >edk2-devel@lists.01.org >https://lists.01.org/mailman/listinfo/edk2-devel