Re: [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific capability header

["Gao, Liming" <liming.gao@intel.com>]

Reviewed-by: Liming Gao <liming.gao@intel.com>

> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Tuesday, September 26, 2017 3:58 AM
> To: edk2-devel-01 <edk2-devel@lists.01.org>
> Cc: Justen, Jordan L <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Marcel Apfelbaum <marcel@redhat.com>;
> Kinney, Michael D <michael.d.kinney@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>
> Subject: [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific capability header
> 
> Revision 2.2 of the PCI Spec defines Capability IDs 0 through 6,
> inclusive, in Appendix H. It reserves IDs 7 through 255.
> 
> Revision 2.3 of the PCI Spec adds Capability IDs 7 through 0xC, inclusive,
> in Appendix H. Capability ID 9 stands for "Vendor Specific".
> 
> Add the EFI_PCI_CAPABILITY_ID_VENDOR macro and the
> EFI_PCI_CAPABILITY_VENDOR_HDR structure type to MdePkg/IndustryStandard,
> in order to describe this capability header.
> 
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Marcel Apfelbaum <marcel@redhat.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Laszlo Ersek <lersek@redhat.com>
> ---
>  MdePkg/Include/IndustryStandard/Pci23.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/MdePkg/Include/IndustryStandard/Pci23.h b/MdePkg/Include/IndustryStandard/Pci23.h
> index 467354429e06..87bd16375c02 100644
> --- a/MdePkg/Include/IndustryStandard/Pci23.h
> +++ b/MdePkg/Include/IndustryStandard/Pci23.h
> @@ -91,8 +91,9 @@
>  ///
>  /// PCI Capability List IDs and records.
>  ///
>  #define EFI_PCI_CAPABILITY_ID_PCIX    0x07
> +#define EFI_PCI_CAPABILITY_ID_VENDOR  0x09
> 
>  #pragma pack(1)
>  ///
>  /// PCI-X Capabilities List,
> @@ -115,8 +116,17 @@ typedef struct {
>    UINT32                  SplitTransCtrlRegUp;
>    UINT32                  SplitTransCtrlRegDn;
>  } EFI_PCI_CAPABILITY_PCIX_BRDG;
> 
> +///
> +/// Vendor Specific Capability Header
> +/// Table H-1: Capability IDs, PCI Local Bus Specification, 2.3
> +///
> +typedef struct {
> +  EFI_PCI_CAPABILITY_HDR  Hdr;
> +  UINT8                   Length;
> +} EFI_PCI_CAPABILITY_VENDOR_HDR;
> +
>  #pragma pack()
> 
>  #define PCI_CODE_TYPE_EFI_IMAGE       0x03
> 
> --
> 2.14.1.3.gb7cf6e02401b
>