From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CAA7D21F322CA for ; Tue, 26 Sep 2017 23:23:21 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP; 26 Sep 2017 23:26:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,443,1500966000"; d="scan'208";a="1199480762" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 26 Sep 2017 23:26:34 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 26 Sep 2017 23:26:34 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 26 Sep 2017 23:26:34 -0700 Received: from shsmsx152.ccr.corp.intel.com ([169.254.6.93]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Wed, 27 Sep 2017 14:26:32 +0800 From: "Gao, Liming" To: Laszlo Ersek , edk2-devel-01 CC: "Justen, Jordan L" , Marcel Apfelbaum , "Kinney, Michael D" , "Ni, Ruiyu" Thread-Topic: [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific capability header Thread-Index: AQHTNjiv40k/tEJUOUqpKTRJKAkF7KLIRqGw Date: Wed, 27 Sep 2017 06:26:31 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E15E045@SHSMSX152.ccr.corp.intel.com> References: <20170925195824.10866-1-lersek@redhat.com> <20170925195824.10866-2-lersek@redhat.com> In-Reply-To: <20170925195824.10866-2-lersek@redhat.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific capability header X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Sep 2017 06:23:21 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao > -----Original Message----- > From: Laszlo Ersek [mailto:lersek@redhat.com] > Sent: Tuesday, September 26, 2017 3:58 AM > To: edk2-devel-01 > Cc: Justen, Jordan L ; Gao, Liming ; Marcel Apfelbaum ; > Kinney, Michael D ; Ni, Ruiyu > Subject: [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific c= apability header >=20 > Revision 2.2 of the PCI Spec defines Capability IDs 0 through 6, > inclusive, in Appendix H. It reserves IDs 7 through 255. >=20 > Revision 2.3 of the PCI Spec adds Capability IDs 7 through 0xC, inclusive= , > in Appendix H. Capability ID 9 stands for "Vendor Specific". >=20 > Add the EFI_PCI_CAPABILITY_ID_VENDOR macro and the > EFI_PCI_CAPABILITY_VENDOR_HDR structure type to MdePkg/IndustryStandard, > in order to describe this capability header. >=20 > Cc: Jordan Justen > Cc: Liming Gao > Cc: Marcel Apfelbaum > Cc: Michael D Kinney > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Laszlo Ersek > --- > MdePkg/Include/IndustryStandard/Pci23.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) >=20 > diff --git a/MdePkg/Include/IndustryStandard/Pci23.h b/MdePkg/Include/Ind= ustryStandard/Pci23.h > index 467354429e06..87bd16375c02 100644 > --- a/MdePkg/Include/IndustryStandard/Pci23.h > +++ b/MdePkg/Include/IndustryStandard/Pci23.h > @@ -91,8 +91,9 @@ > /// > /// PCI Capability List IDs and records. > /// > #define EFI_PCI_CAPABILITY_ID_PCIX 0x07 > +#define EFI_PCI_CAPABILITY_ID_VENDOR 0x09 >=20 > #pragma pack(1) > /// > /// PCI-X Capabilities List, > @@ -115,8 +116,17 @@ typedef struct { > UINT32 SplitTransCtrlRegUp; > UINT32 SplitTransCtrlRegDn; > } EFI_PCI_CAPABILITY_PCIX_BRDG; >=20 > +/// > +/// Vendor Specific Capability Header > +/// Table H-1: Capability IDs, PCI Local Bus Specification, 2.3 > +/// > +typedef struct { > + EFI_PCI_CAPABILITY_HDR Hdr; > + UINT8 Length; > +} EFI_PCI_CAPABILITY_VENDOR_HDR; > + > #pragma pack() >=20 > #define PCI_CODE_TYPE_EFI_IMAGE 0x03 >=20 > -- > 2.14.1.3.gb7cf6e02401b >=20