From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 85CDC22152383 for ; Mon, 4 Dec 2017 07:31:55 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Dec 2017 07:36:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,359,1508828400"; d="scan'208";a="15207226" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga002.jf.intel.com with ESMTP; 04 Dec 2017 07:36:24 -0800 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 4 Dec 2017 07:36:24 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 4 Dec 2017 07:36:23 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.152]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Mon, 4 Dec 2017 23:36:22 +0800 From: "Gao, Liming" To: Pete Batard , "edk2-devel@lists.01.org" Thread-Topic: [PATCH 1/6] MdePkg: Disable some Level 4 warnings for VS2017/ARM Thread-Index: AQHTbQGE0R2x1T4zKEajoyVdW25CUKMzUCuw Date: Mon, 4 Dec 2017 15:36:22 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E189CE6@SHSMSX104.ccr.corp.intel.com> References: <20171204131205.11304-1-pete@akeo.ie> <20171204131205.11304-2-pete@akeo.ie> In-Reply-To: <20171204131205.11304-2-pete@akeo.ie> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/6] MdePkg: Disable some Level 4 warnings for VS2017/ARM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Dec 2017 15:31:55 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Pete: I suggest to align the disabled warning list to IA32/X64 arch. I find som= eone are not listed in IA32/X64 arch. Could you give the more detail on why= disable them by default? Thanks Liming > -----Original Message----- > From: Pete Batard [mailto:pete@akeo.ie] > Sent: Monday, December 4, 2017 9:12 PM > To: edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: [PATCH 1/6] MdePkg: Disable some Level 4 warnings for VS2017/ARM >=20 > Warnings 4018, 4100, 4101, 4127, 4214, 4244, 4456, 4701 and 4703 are > disabled as they were found to occur more than 5 times during QEMU > firmware compilation. >=20 > Also create a dummy macro for PRESERVE8, as this is not supported by > the Microsoft ARM assembler. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Pete Batard > --- > MdePkg/Include/Arm/ProcessorBind.h | 96 +++++++++++++++----- > 1 file changed, 75 insertions(+), 21 deletions(-) >=20 > diff --git a/MdePkg/Include/Arm/ProcessorBind.h b/MdePkg/Include/Arm/Proc= essorBind.h > index dde1fd1152ba..00de80bafe0a 100644 > --- a/MdePkg/Include/Arm/ProcessorBind.h > +++ b/MdePkg/Include/Arm/ProcessorBind.h > @@ -1,15 +1,15 @@ > /** @file > Processor or Compiler specific defines and types for ARM. >=20 > - Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
> + Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > - This program and the accompanying materials > - are licensed and made available under the terms and conditions of the = BSD License > - which accompanies this distribution. The full text of the license may= be found at > - http://opensource.org/licenses/bsd-license.php > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the = BSD License > + which accompanies this distribution. The full text of the license may= be found at > + http://opensource.org/licenses/bsd-license.php >=20 > - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. >=20 > **/ >=20 > @@ -28,14 +28,63 @@ > #pragma pack() > #endif >=20 > +#if defined(_MSC_EXTENSIONS) > + > // > -// RVCT does not support the __builtin_unreachable() macro > +// Disable 'signed/unsigned mismatch' warnings. > // > -#ifdef __ARMCC_VERSION > +#pragma warning ( disable : 4018 ) > + > +// > +// Disable 'unreferenced formal parameter' warnings. > +// > +#pragma warning ( disable : 4100 ) > + > +// > +// Disable 'unreferenced local variable' warnings. > +// > +#pragma warning ( disable : 4101 ) > + > +// > +// Suppress warnings for ASSERT(FALSE) or while(TRUE). > +// > +#pragma warning ( disable : 4127 ) > + > +// > +// Disable bitfield type check warnings. > +// > +#pragma warning ( disable : 4214 ) > + > +// > +// Disable 'conversion from X to Y, possible loss of data' warnings > +// > +#pragma warning ( disable : 4244 ) > + > +// > +// Disable 'declaration of X hides previous local declaration' warnings > +// > +#pragma warning ( disable : 4456 ) > + > +// > +// Disable 'potentially uninitialized local variable X used' warnings > +// > +#pragma warning ( disable : 4701 ) > + > +// > +// Disable 'potentially uninitialized local pointer variable X used' war= nings > +// > +#pragma warning ( disable : 4703 ) > + > +#endif > + > +// > +// RVCT and MSFT don't support the __builtin_unreachable() macro > +// > +#if defined(__ARMCC_VERSION) || defined(_MSC_EXTENSIONS) > #define UNREACHABLE() > #endif >=20 > -#if _MSC_EXTENSIONS > +#if defined(_MSC_EXTENSIONS) > // > // use Microsoft* C compiler dependent integer width types > // > @@ -52,7 +101,7 @@ > typedef signed char INT8; > #else > // > - // Assume standard ARM alignment. > + // Assume standard ARM alignment. > // Need to check portability of long long > // > typedef unsigned long long UINT64; > @@ -121,7 +170,7 @@ typedef INT32 INTN; > // use the correct C calling convention. All protocol member functions a= nd > // EFI intrinsics are required to modify their member functions with EFI= API. > // > -#define EFIAPI > +#define EFIAPI >=20 > // When compiling with Clang, we still use GNU as for the assembler, so = we still > // need to define the GCC_ASM* macros. > @@ -142,34 +191,39 @@ typedef INT32 INTN; >=20 > #define GCC_ASM_EXPORT(func__) \ > .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\ > - .type ASM_PFX(func__), %function > + .type ASM_PFX(func__), %function >=20 > #define GCC_ASM_IMPORT(func__) \ > .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__) > - > + > #else > // > - // .type not supported by Apple Xcode tools > + // .type not supported by Apple Xcode tools > // > - #define INTERWORK_FUNC(func__) > + #define INTERWORK_FUNC(func__) >=20 > #define GCC_ASM_EXPORT(func__) \ > .globl _CONCATENATE (__USER_LABEL_PREFIX__, func__) \ > - > - #define GCC_ASM_IMPORT(name) > + > + #define GCC_ASM_IMPORT(name) >=20 > #endif > +#elif defined(_MSC_EXTENSIONS) > + // > + // PRESERVE8 is not supported by the MSFT assembler. > + // > + #define PRESERVE8 > #endif >=20 > /** > Return the pointer to the first instruction of a function given a func= tion pointer. > - On ARM CPU architectures, these two pointer values are the same, > + On ARM CPU architectures, these two pointer values are the same, > so the implementation of this macro is very simple. > - > + > @param FunctionPointer A pointer to a function. >=20 > @return The pointer to the first instruction of a function given a fun= ction pointer. > - > + > **/ > #define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPo= inter) >=20 > -- > 2.9.3.windows.2