From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5765722361E60 for ; Wed, 7 Feb 2018 22:22:10 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Feb 2018 22:27:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,477,1511856000"; d="scan'208";a="16516152" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga008.jf.intel.com with ESMTP; 07 Feb 2018 22:27:52 -0800 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 7 Feb 2018 22:27:35 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 7 Feb 2018 22:27:33 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.125]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.116]) with mapi id 14.03.0319.002; Thu, 8 Feb 2018 14:27:30 +0800 From: "Gao, Liming" To: "Bi, Dandan" , "edk2-devel@lists.01.org" CC: "Dong, Eric" , Laszlo Ersek Thread-Topic: [PATCH v2] UefiCpuPkg/S3Resume: Add more perf entry for S3 phase Thread-Index: AQHToKThy7SpbGlfikCW0MXiJnY7faOaCn3Q Date: Thu, 8 Feb 2018 06:27:30 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E1C9B1A@SHSMSX104.ccr.corp.intel.com> References: <1518070792-13076-1-git-send-email-dandan.bi@intel.com> In-Reply-To: <1518070792-13076-1-git-send-email-dandan.bi@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2] UefiCpuPkg/S3Resume: Add more perf entry for S3 phase X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 06:22:10 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao >-----Original Message----- >From: Bi, Dandan >Sent: Thursday, February 08, 2018 2:20 PM >To: edk2-devel@lists.01.org >Cc: Dong, Eric ; Laszlo Ersek ; >Gao, Liming >Subject: [PATCH v2] UefiCpuPkg/S3Resume: Add more perf entry for S3 >phase > >V2: Just update the commit message. > >Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/ >EndOfS3Resume. > >Add the new perf entry with Identifier >PERF_INMODULE_START_ID/PERF_INMODULE_END_ID which are defined >in new performance infrastructure (edk2 trunk commit hash value: >SHA-1: 73fef64f14d1b97ae9bd4705df3becc022391eba ~ >SHA-1: 115eae650bfd2be2c2bc37360f4a755065e774c4). >PERF_INMODULE_START_ID/PERF_INMODULE_END_ID are general Identifier >which are used within a module. > >Cc: Eric Dong >Cc: Laszlo Ersek >Cc: Liming Gao >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Dandan Bi >--- > UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 15 >++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > >diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c >b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c >index b597ac7..d7d2a4d 100644 >--- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c >+++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c >@@ -2,11 +2,11 @@ > This module produces the EFI_PEI_S3_RESUME2_PPI. > This module works with StandAloneBootScriptExecutor to S3 resume to OS. > This module will execute the boot script saved during last boot and aft= er that, > control is passed to OS waking up handler. > >- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
>+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Copyright (c) 2017, AMD Incorporated. All rights reserved.
> > This program and the accompanying materials > are licensed and made available under the terms and conditions > of the BSD License which accompanies this distribution. The >@@ -21,10 +21,11 @@ > #include > > #include > #include > #include >+#include > #include > #include > #include > #include > #include >@@ -551,13 +552,17 @@ S3ResumeBootOs ( > PERF_END (NULL, "ScriptExec", NULL, 0); > > // > // Install BootScriptDonePpi > // >+ PERF_START_EX (NULL, "BootScriptDonePpi", NULL, 0, >PERF_INMODULE_START_ID); >+ > Status =3D PeiServicesInstallPpi (&mPpiListPostScriptTable); > ASSERT_EFI_ERROR (Status); > >+ PERF_END_EX (NULL, "BootScriptDonePpi", NULL, 0, >PERF_INMODULE_END_ID); >+ > // > // Get ACPI Table Address > // > Facs =3D (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) >(AcpiS3Context->AcpiFacsTable)); > >@@ -576,18 +581,26 @@ S3ResumeBootOs ( > } > > // > // Install EndOfPeiPpi > // >+ PERF_START_EX (NULL, "EndOfPeiPpi", NULL, 0, >PERF_INMODULE_START_ID); >+ > Status =3D PeiServicesInstallPpi (&mPpiListEndOfPeiTable); > ASSERT_EFI_ERROR (Status); > >+ PERF_END_EX (NULL, "EndOfPeiPpi", NULL, 0, PERF_INMODULE_END_ID); >+ > // > // Signal EndOfS3Resume event. > // >+ PERF_START_EX (NULL, "EndOfS3Resume", NULL, 0, >PERF_INMODULE_START_ID); >+ > SignalEndOfS3Resume (); > >+ PERF_END_EX (NULL, "EndOfS3Resume", NULL, 0, >PERF_INMODULE_END_ID); >+ > // > // report status code on S3 resume > // > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, >EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE); > >-- >1.9.5.msysgit.1