From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 95633223DB79E for ; Thu, 8 Feb 2018 22:51:13 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Feb 2018 22:56:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,482,1511856000"; d="scan'208";a="25997160" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga003.jf.intel.com with ESMTP; 08 Feb 2018 22:56:58 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 8 Feb 2018 22:56:58 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.125]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.116]) with mapi id 14.03.0319.002; Fri, 9 Feb 2018 14:56:56 +0800 From: "Gao, Liming" To: "Bi, Dandan" , "edk2-devel@lists.01.org" CC: "Dong, Eric" Thread-Topic: [patch] MdeModulePkg/DriverSampleDxe: Make bit fields aligned in C structure Thread-Index: AQHToOknaHdjw/71Z02IZKfPVSceSqObo4wg Date: Fri, 9 Feb 2018 06:56:55 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E1CAD00@SHSMSX104.ccr.corp.intel.com> References: <1518100119-6448-1-git-send-email-dandan.bi@intel.com> In-Reply-To: <1518100119-6448-1-git-send-email-dandan.bi@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [patch] MdeModulePkg/DriverSampleDxe: Make bit fields aligned in C structure X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Feb 2018 06:51:14 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao >-----Original Message----- >From: Bi, Dandan >Sent: Thursday, February 08, 2018 10:29 PM >To: edk2-devel@lists.01.org >Cc: Dong, Eric ; Gao, Liming >Subject: [patch] MdeModulePkg/DriverSampleDxe: Make bit fields aligned in >C structure > >For a structure with a series of bit fields and used as a storage >in vfr file, and if the bit fields do not add up to the size of >the defined type.In the C code use sizeof() to get size of the >structure, the results may vary form the compiler(VS,GCC...). >But the size of the storage calculated by VfrCompiler is fixed >(calculate with alignment).To avoid the issue cased by above case, >we need to make the total width of the bit fields in the structure >aligned with the size of the defined type for these bit fields. > >Cc: Eric Dong >Cc: Liming Gao >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Dandan Bi >--- > MdeModulePkg/Universal/DriverSampleDxe/NVDataStruc.h | 11 >+++++++++++ > 1 file changed, 11 insertions(+) > >diff --git a/MdeModulePkg/Universal/DriverSampleDxe/NVDataStruc.h >b/MdeModulePkg/Universal/DriverSampleDxe/NVDataStruc.h >index 40fb3d0..af3d4bc 100644 >--- a/MdeModulePkg/Universal/DriverSampleDxe/NVDataStruc.h >+++ b/MdeModulePkg/Universal/DriverSampleDxe/NVDataStruc.h >@@ -33,10 +33,18 @@ Revision History: > #define CONFIGURATION_VARSTORE_ID 0x1234 > #define BITS_VARSTORE_ID 0x2345 > > #pragma pack(1) > >+// >+// !!! For a structure with a series of bit fields and used as a storage = in vfr file, >and if the bit fields do not add up to the size of the defined type. >+// In the C code use sizeof() to get the size the strucure, the results m= ay vary >form the compiler(VS,GCC...). >+// But the size of the storage calculated by VfrCompiler is fixed (calcul= ate >with alignment). >+// To avoid above case, we need to make the total bit width in the struct= ure >aligned with the size of the defined type for these bit fields. We can: >+// 1. Add bit field (with/without name) with remianing with for padding. >+// 2. Add unnamed bit field with 0 for padding, the amount of padding is >determined by the alignment characteristics of the members of the structur= e. >+// > typedef struct { > UINT16 NestByteField; > UINT8 : 1; // unamed field can be used for padding > UINT8 NestBitCheckbox : 1; > UINT8 NestBitOneof : 2; >@@ -82,11 +90,13 @@ typedef struct { > EFI_HII_TIME Time; > UINT8 RefreshGuidCount; > UINT8 Match2; > UINT8 GetDefaultValueFromCallBackForOrderedList[3]; > UINT8 BitCheckbox : 1; >+ UINT8 ReservedBits: 7; // Reserved bit fields for padding. > UINT16 BitOneof : 6; >+ UINT16 : 0; // Width 0 used to force alignment. > UINT16 BitNumeric : 12; > MY_BITS_DATA MyBitData; > MY_EFI_UNION_DATA MyUnionData; > } DRIVER_SAMPLE_CONFIGURATION; > >@@ -107,10 +117,11 @@ typedef struct { > MY_BITS_DATA BitsData; > UINT32 EfiBitGrayoutTest : 5; > UINT32 EfiBitNumeric : 4; > UINT32 EfiBitOneof : 10; > UINT32 EfiBitCheckbox : 1; >+ UINT32 : 0; // Width 0 used to force alignment. > } MY_EFI_BITS_VARSTORE_DATA; > > // > // Labels definition > // >-- >1.9.5.msysgit.1