From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6E2CA209574D9 for ; Tue, 27 Feb 2018 01:43:52 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Feb 2018 01:49:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,400,1515484800"; d="scan'208";a="20617924" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga007.jf.intel.com with ESMTP; 27 Feb 2018 01:49:57 -0800 Received: from fmsmsx117.amr.corp.intel.com (10.18.116.17) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 27 Feb 2018 01:49:57 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx117.amr.corp.intel.com (10.18.116.17) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 27 Feb 2018 01:49:56 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.125]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.116]) with mapi id 14.03.0319.002; Tue, 27 Feb 2018 17:49:54 +0800 From: "Gao, Liming" To: Felix Polyudov , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" Thread-Topic: [PATCH] MdePkg/Include/IndustryStandard: Add PCI Express 4.0 header file Thread-Index: AQHTrwzmkIDpkvXDw0yrtv561Bn8nKO4Acxw Date: Tue, 27 Feb 2018 09:49:53 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E1D4082@SHSMSX104.ccr.corp.intel.com> References: <20180226141957.15032-1-felixp@ami.com> In-Reply-To: <20180226141957.15032-1-felixp@ami.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdePkg/Include/IndustryStandard: Add PCI Express 4.0 header file X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Feb 2018 09:43:52 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Felix: Structure PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0 is not sa= me to the one defined in spec. Could you define the complete structure? Thanks Liming >-----Original Message----- >From: Felix Polyudov [mailto:felixp@ami.com] >Sent: Monday, February 26, 2018 10:20 PM >To: edk2-devel@lists.01.org >Cc: Kinney, Michael D ; Gao, Liming > >Subject: [PATCH] MdePkg/Include/IndustryStandard: Add PCI Express 4.0 >header file > >The header includes Physical Layer PCI Express Extended Capability definit= ions >described in section 7.7.5 of PCI Express Base Specification rev. 4.0. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Felix Polyudov >--- > MdePkg/Include/IndustryStandard/PciExpress40.h | 69 >++++++++++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 MdePkg/Include/IndustryStandard/PciExpress40.h > >diff --git a/MdePkg/Include/IndustryStandard/PciExpress40.h >b/MdePkg/Include/IndustryStandard/PciExpress40.h >new file mode 100644 >index 0000000..e0f4323 >--- /dev/null >+++ b/MdePkg/Include/IndustryStandard/PciExpress40.h >@@ -0,0 +1,69 @@ >+/** @file >+Support for the PCI Express 4.0 standard. >+ >+This header file may not define all structures. Please extend as require= d. >+ >+Copyright (c) 2018, American Megatrends, Inc. All rights reserved.
>+This program and the accompanying materials >+are licensed and made available under the terms and conditions of the BSD >License >+which accompanies this distribution. The full text of the license may be >found at >+http://opensource.org/licenses/bsd-license.php >+ >+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" >BASIS, >+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER >EXPRESS OR IMPLIED. >+ >+**/ >+ >+#ifndef _PCIEXPRESS40_H_ >+#define _PCIEXPRESS40_H_ >+ >+#include >+ >+#pragma pack(1) >+ >+/// The Physical Layer PCI Express Extended Capability definitions. >+/// >+/// Based on section 7.7.5 of PCI Express Base Specification 4.0. >+///@{ >+#define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_16_0_ID >0x0026 >+#define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_16_0_VER1 >0x1 >+ >+// Register offsets from Physical Layer PCI-E Ext Cap Header >+#define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CAPABILITIES_OFFSET >0x04 >+#define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CONTROL_OFFSET >0x08 >+#define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS_OFFSET >0x0C >+#define >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LOCAL_DATA_PARITY_STATUS_O >FFSET 0x10 >+#define >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_FIRST_RETIMER_DATA_PARITY_S >TATUS_OFFSET 0x14 >+#define >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_SECOND_RETIMER_DATA_PARITY >_STATUS_OFFSET 0x18 >+#define >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL >_OFFSET 0x20 >+ >+typedef union { >+ struct { >+ UINT32 EqualizationComplete : 1; // bit 0 >+ UINT32 EqualizationPhase1Success : 1; // bit 1 >+ UINT32 EqualizationPhase2Success : 1; // bit 2 >+ UINT32 EqualizationPhase3Success : 1; // bit 3 >+ UINT32 LinkEqualizationRequest : 1; // bit 4 >+ UINT32 Reserved : 27; // Reserved bit 5:31 >+ } Bits; >+ UINT32 Uint32; >+} PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS; >+ >+typedef union { >+ struct { >+ UINT8 DownstreamPortTransmitterPreset : 4; //bit 0..3 >+ UINT8 UpstreamPortTransmitterPreset : 4; //bit 4..7 >+ } Bits; >+ UINT8 Uint8; >+} >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL; >+ >+typedef struct { >+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header; >+ PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS Status; >+ >PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL >Control; >+} PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0; >+///@} >+ >+#pragma pack() >+ >+#endif >-- >2.10.0.windows.1 > > > >Please consider the environment before printing this email. > >The information contained in this message may be confidential and >proprietary to American Megatrends, Inc. This communication is intended t= o >be read only by the individual or entity to whom it is addressed or by the= ir >designee. If the reader of this message is not the intended recipient, you= are >on notice that any distribution of this message, in any form, is strictly >prohibited. Please promptly notify the sender by reply e-mail or by telep= hone >at 770-246-8600, and then delete or destroy all copies of the transmission= .