From: "Gao, Liming" <liming.gao@intel.com>
To: "Zeng, Star" <star.zeng@intel.com>,
"Bi, Dandan" <dandan.bi@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
Date: Tue, 28 Aug 2018 01:55:43 +0000 [thread overview]
Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E2E9B20@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103BBB21D6@shsmsx102.ccr.corp.intel.com>
I have no other comments. Reviewed-by: Liming Gao <liming.gao@intel.com>
>-----Original Message-----
>From: Zeng, Star
>Sent: Monday, August 27, 2018 9:07 AM
>To: Bi, Dandan <dandan.bi@intel.com>; edk2-devel@lists.01.org
>Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D
><michael.d.kinney@intel.com>; Zeng, Star <star.zeng@intel.com>
>Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>Agree and thanks.
>
>Star
>-----Original Message-----
>From: Bi, Dandan
>Sent: Monday, August 27, 2018 9:00 AM
>To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org
>Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D
><michael.d.kinney@intel.com>
>Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>Hi Star,
>
>One minor comment:
>How about update
>+ UINT8 MemoryTechnology; ///<
>MEMORY_DEVICE_TECHNOLOGY
>To
>+ UINT8 MemoryTechnology; ///< The enumeration value
>from MEMORY_DEVICE_TECHNOLOGY.
>In order to keep consistent with current comments style.
>
>With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com>
>
>
>Thanks,
>Dandan
>
>-----Original Message-----
>From: Zeng, Star
>Sent: Thursday, August 23, 2018 11:36 AM
>To: edk2-devel@lists.01.org
>Cc: Zeng, Star <star.zeng@intel.com>; Gao, Liming <liming.gao@intel.com>; Bi,
>Dandan <dandan.bi@intel.com>; Kinney, Michael D
><michael.d.kinney@intel.com>
>Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
>
>Add SMBIOS 3.2.0 definitions according to
>www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
>
>Processor Information (Type 4):
>- SMBIOSCR00163: add socket LGA2066
>- SMBIOSCR00173: add Intel Core i9
>- SMBIOSCR00176: add new processor sockets Port Connector Information
>(Type 8):
>- SMBIOSCR00168: add USB Type-C
>System Slots (Type 9):
>- SMBIOSCR00164: add "unavailable" to current usage field
>- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17):
>- SMBIOSCR00162: add support for NVDIMMs
>- SMBIOSCR00166: extend support for NVDIMMs and add support for logical
>memory type
>- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured
>Memory Speed"
>- SMBIOSCR00174: add new memory technology value (Intel Persistent
>Memory, 3D XPoint) IPMI Device Information (Type 38):
>- SMBIOSCR00171: add SSIF
>Management Controller Host Interface (Type 42)
>- SMBIOSCR00175: fix structure data parsing issue
>
>V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
>
>Cc: Liming Gao <liming.gao@intel.com>
>Cc: Dandan Bi <dandan.bi@intel.com>
>Cc: Michael D Kinney <michael.d.kinney@intel.com>
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Star Zeng <star.zeng@intel.com>
>---
> MdePkg/Include/IndustryStandard/SmBios.h | 155
>++++++++++++++++++++++++-------
> 1 file changed, 120 insertions(+), 35 deletions(-)
>
>diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
>b/MdePkg/Include/IndustryStandard/SmBios.h
>index 5d0442873dfc..61e2f9421f97 100644
>--- a/MdePkg/Include/IndustryStandard/SmBios.h
>+++ b/MdePkg/Include/IndustryStandard/SmBios.h
>@@ -1,5 +1,5 @@
> /** @file
>- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
>+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
>@@ -685,6 +685,7 @@ typedef enum {
> ProcessorFamilyzArchitecture = 0xCC,
> ProcessorFamilyIntelCoreI5 = 0xCD,
> ProcessorFamilyIntelCoreI3 = 0xCE,
>+ ProcessorFamilyIntelCoreI9 = 0xCF,
> ProcessorFamilyViaC7M = 0xD2,
> ProcessorFamilyViaC7D = 0xD3,
> ProcessorFamilyViaC7 = 0xD4,
>@@ -806,7 +807,11 @@ typedef enum {
> ProcessorUpgradeSocketBGA1515 = 0x35,
> ProcessorUpgradeSocketLGA3647_1 = 0x36,
> ProcessorUpgradeSocketSP3 = 0x37,
>- ProcessorUpgradeSocketSP3r2 = 0x38
>+ ProcessorUpgradeSocketSP3r2 = 0x38,
>+ ProcessorUpgradeSocketLGA2066 = 0x39,
>+ ProcessorUpgradeSocketBGA1392 = 0x3A,
>+ ProcessorUpgradeSocketBGA1510 = 0x3B,
>+ ProcessorUpgradeSocketBGA1528 = 0x3C
> } PROCESSOR_UPGRADE;
>
> ///
>@@ -1159,6 +1164,7 @@ typedef enum {
> PortConnectorTypeBNC = 0x20,
> PortConnectorType1394 = 0x21,
> PortConnectorTypeSasSata = 0x22,
>+ PortConnectorTypeUsbTypeC = 0x23,
> PortConnectorTypePC98 = 0xA0,
> PortConnectorTypePC98Hireso = 0xA1,
> PortConnectorTypePCH98 = 0xA2,
>@@ -1205,6 +1211,8 @@ typedef enum {
> PortTypeNetworkPort = 0x1F,
> PortTypeSata = 0x20,
> PortTypeSas = 0x21,
>+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
>+ PortTypeThunderbolt = 0x23,
> PortType8251Compatible = 0xA0,
> PortType8251FifoCompatible = 0xA1,
> PortTypeOther = 0xFF
>@@ -1314,10 +1322,11 @@ typedef enum {
> /// System Slots - Current Usage.
> ///
> typedef enum {
>- SlotUsageOther = 0x01,
>- SlotUsageUnknown = 0x02,
>- SlotUsageAvailable = 0x03,
>- SlotUsageInUse = 0x04
>+ SlotUsageOther = 0x01,
>+ SlotUsageUnknown = 0x02,
>+ SlotUsageAvailable = 0x03,
>+ SlotUsageInUse = 0x04,
>+ SlotUsageUnavailable = 0x05
> } MISC_SLOT_USAGE;
>
> ///
>@@ -1350,10 +1359,21 @@ typedef struct {
> UINT8 PmeSignalSupported :1;
> UINT8 HotPlugDevicesSupported :1;
> UINT8 SmbusSignalSupported :1;
>- UINT8 Reserved :5; ///< Set to 0.
>+ UINT8 BifurcationSupported :1;
>+ UINT8 Reserved :4; ///< Set to 0.
> } MISC_SLOT_CHARACTERISTICS2;
>
> ///
>+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups ///
>+typedef struct {
>+ UINT16 SegmentGroupNum;
>+ UINT8 BusNum;
>+ UINT8 DevFuncNum;
>+ UINT8 DataBusWidth;
>+} MISC_SLOT_PEER_GROUP;
>+
>+///
> /// System Slots (Type 9)
> ///
> /// The information in this structure defines the attributes of a system slot.
>@@ -1376,6 +1396,12 @@ typedef struct {
> UINT16 SegmentGroupNum;
> UINT8 BusNum;
> UINT8 DevFuncNum;
>+ //
>+ // Add for smbios 3.2
>+ //
>+ UINT8 DataBusWidth;
>+ UINT8 PeerGroupingCount;
>+ MISC_SLOT_PEER_GROUP PeerGroups[1];
> } SMBIOS_TABLE_TYPE9;
>
> ///
>@@ -1668,9 +1694,13 @@ typedef enum {
> MemoryTypeLpddr = 0x1B,
> MemoryTypeLpddr2 = 0x1C,
> MemoryTypeLpddr3 = 0x1D,
>- MemoryTypeLpddr4 = 0x1E
>+ MemoryTypeLpddr4 = 0x1E,
>+ MemoryTypeLogicalNonVolatileDevice = 0x1F
> } MEMORY_DEVICE_TYPE;
>
>+///
>+/// Memory Device - Type Detail
>+///
> typedef struct {
> UINT16 Reserved :1;
> UINT16 Other :1;
>@@ -1691,6 +1721,41 @@ typedef struct {
> } MEMORY_DEVICE_TYPE_DETAIL;
>
> ///
>+/// Memory Device - Memory Technology
>+///
>+typedef enum {
>+ MemoryTechnologyOther = 0x01,
>+ MemoryTechnologyUnknown = 0x02,
>+ MemoryTechnologyDram = 0x03,
>+ MemoryTechnologyNvdimmN = 0x04,
>+ MemoryTechnologyNvdimmF = 0x05,
>+ MemoryTechnologyNvdimmP = 0x06,
>+ MemoryTechnologyIntelPersistentMemory = 0x07
>+} MEMORY_DEVICE_TECHNOLOGY;
>+
>+///
>+/// Memory Device - Memory Operating Mode Capability /// typedef union
>+{
>+ ///
>+ /// Individual bit fields
>+ ///
>+ struct {
>+ UINT16 Reserved :1; ///< Set to 0.
>+ UINT16 Other :1;
>+ UINT16 Unknown :1;
>+ UINT16 VolatileMemory :1;
>+ UINT16 ByteAccessiblePersistentMemory :1;
>+ UINT16 BlockAccessiblePersistentMemory :1;
>+ UINT16 Reserved2 :10; ///< Set to 0.
>+ } Bits;
>+ ///
>+ /// All bit fields as a 16-bit value
>+ ///
>+ UINT16 Uint16;
>+} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
>+
>+///
> /// Memory Device (Type 17).
> ///
> /// This structure describes a single memory device that is part of @@ -
>1700,38 +1765,57 @@ typedef struct { /// socket is currently populated.
> ///
> typedef struct {
>- SMBIOS_STRUCTURE Hdr;
>- UINT16 MemoryArrayHandle;
>- UINT16 MemoryErrorInformationHandle;
>- UINT16 TotalWidth;
>- UINT16 DataWidth;
>- UINT16 Size;
>- UINT8 FormFactor; ///< The enumeration value from
>MEMORY_FORM_FACTOR.
>- UINT8 DeviceSet;
>- SMBIOS_TABLE_STRING DeviceLocator;
>- SMBIOS_TABLE_STRING BankLocator;
>- UINT8 MemoryType; ///< The enumeration value from
>MEMORY_DEVICE_TYPE.
>- MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
>- UINT16 Speed;
>- SMBIOS_TABLE_STRING Manufacturer;
>- SMBIOS_TABLE_STRING SerialNumber;
>- SMBIOS_TABLE_STRING AssetTag;
>- SMBIOS_TABLE_STRING PartNumber;
>+ SMBIOS_STRUCTURE Hdr;
>+ UINT16 MemoryArrayHandle;
>+ UINT16 MemoryErrorInformationHandle;
>+ UINT16 TotalWidth;
>+ UINT16 DataWidth;
>+ UINT16 Size;
>+ UINT8 FormFactor; ///< The enumeration value from
>MEMORY_FORM_FACTOR.
>+ UINT8 DeviceSet;
>+ SMBIOS_TABLE_STRING DeviceLocator;
>+ SMBIOS_TABLE_STRING BankLocator;
>+ UINT8 MemoryType; ///< The enumeration value
>from MEMORY_DEVICE_TYPE.
>+ MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
>+ UINT16 Speed;
>+ SMBIOS_TABLE_STRING Manufacturer;
>+ SMBIOS_TABLE_STRING SerialNumber;
>+ SMBIOS_TABLE_STRING AssetTag;
>+ SMBIOS_TABLE_STRING PartNumber;
> //
> // Add for smbios 2.6
> //
>- UINT8 Attributes;
>+ UINT8 Attributes;
> //
> // Add for smbios 2.7
> //
>- UINT32 ExtendedSize;
>- UINT16 ConfiguredMemoryClockSpeed;
>+ UINT32 ExtendedSize;
>+ //
>+ // Keep using name "ConfiguredMemoryClockSpeed" for compatibility //
>+ although this field is renamed from "Configured Memory Clock Speed"
>+ // to "Configured Memory Speed" in smbios 3.2.0.
>+ //
>+ UINT16 ConfiguredMemoryClockSpeed;
> //
> // Add for smbios 2.8.0
> //
>- UINT16 MinimumVoltage;
>- UINT16 MaximumVoltage;
>- UINT16 ConfiguredVoltage;
>+ UINT16 MinimumVoltage;
>+ UINT16 MaximumVoltage;
>+ UINT16 ConfiguredVoltage;
>+ //
>+ // Add for smbios 3.2.0
>+ //
>+ UINT8 MemoryTechnology; ///<
>MEMORY_DEVICE_TECHNOLOGY
>+ MEMORY_DEVICE_OPERATING_MODE_CAPABILITY
>MemoryOperatingModeCapability;
>+ SMBIOS_TABLE_STRING FirwareVersion;
>+ UINT16 ModuleManufacturerID;
>+ UINT16 ModuleProductID;
>+ UINT16 MemorySubsystemControllerManufacturerID;
>+ UINT16 MemorySubsystemControllerProductID;
>+ UINT64 NonVolatileSize;
>+ UINT64 VolatileSize;
>+ UINT64 CacheSize;
>+ UINT64 LogicalSize;
> } SMBIOS_TABLE_TYPE17;
>
> ///
>@@ -2269,7 +2353,7 @@ typedef enum {
> IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller
>Style.
> IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server
>Management Interface Chip.
> IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
>- IPMIDeviceInfoInterfaceTypeReserved = 0x04
>+ IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
> } BMC_INTERFACE_TYPE;
>
> ///
>@@ -2339,7 +2423,7 @@ typedef struct {
> UINT8 ReferencedOffset;
> SMBIOS_TABLE_STRING EntryString;
> UINT8 Value[1];
>-}ADDITIONAL_INFORMATION_ENTRY;
>+} ADDITIONAL_INFORMATION_ENTRY;
>
> ///
> /// Additional Information (Type 40).
>@@ -2425,8 +2509,9 @@ typedef enum{
> ///
> typedef struct {
> SMBIOS_STRUCTURE Hdr;
>- UINT8 InterfaceType; ///< The enumeration value from
>MC_HOST_INTERFACE_TYPE
>- UINT8 MCHostInterfaceData[1]; ///< This field has a minimum
>of four bytes
>+ UINT8 InterfaceType; ///< The enumeration value
>from MC_HOST_INTERFACE_TYPE
>+ UINT8 InterfaceTypeSpecificDataLength;
>+ UINT8 InterfaceTypeSpecificData[4]; ///< This field has a
>minimum of four bytes
> } SMBIOS_TABLE_TYPE42;
>
> ///
>--
>2.7.0.windows.1
next prev parent reply other threads:[~2018-08-28 1:56 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-23 3:36 [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions Star Zeng
2018-08-23 3:36 ` [PATCH V2 1/2] MdePkg SmBios.h: " Star Zeng
2018-08-27 1:00 ` Bi, Dandan
2018-08-27 1:06 ` Zeng, Star
2018-08-28 1:55 ` Gao, Liming [this message]
2018-08-23 3:36 ` [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 Star Zeng
2018-08-27 1:00 ` Bi, Dandan
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