From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DF423210F41D0 for ; Mon, 27 Aug 2018 18:56:14 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Aug 2018 18:56:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,297,1531810800"; d="scan'208";a="68596381" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga008.jf.intel.com with ESMTP; 27 Aug 2018 18:55:53 -0700 Received: from fmsmsx122.amr.corp.intel.com (10.18.125.37) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 27 Aug 2018 18:55:53 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx122.amr.corp.intel.com (10.18.125.37) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 27 Aug 2018 18:55:53 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.143]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.185]) with mapi id 14.03.0319.002; Tue, 28 Aug 2018 09:55:43 +0800 From: "Gao, Liming" To: "Zeng, Star" , "Bi, Dandan" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" Thread-Topic: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions Thread-Index: AQHUOpKB8ikweXJ/LEmhWTseaGcT9qTSR1wAgAAB1oCAAiYUkA== Date: Tue, 28 Aug 2018 01:55:43 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E2E9B20@SHSMSX104.ccr.corp.intel.com> References: <1534995380-26964-1-git-send-email-star.zeng@intel.com> <1534995380-26964-2-git-send-email-star.zeng@intel.com> <3C0D5C461C9E904E8F62152F6274C0BB3BB6F37B@shsmsx102.ccr.corp.intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103BBB21D6@shsmsx102.ccr.corp.intel.com> In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103BBB21D6@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Aug 2018 01:56:15 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I have no other comments. Reviewed-by: Liming Gao >-----Original Message----- >From: Zeng, Star >Sent: Monday, August 27, 2018 9:07 AM >To: Bi, Dandan ; edk2-devel@lists.01.org >Cc: Gao, Liming ; Kinney, Michael D >; Zeng, Star >Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >Agree and thanks. > >Star >-----Original Message----- >From: Bi, Dandan >Sent: Monday, August 27, 2018 9:00 AM >To: Zeng, Star ; edk2-devel@lists.01.org >Cc: Gao, Liming ; Kinney, Michael D > >Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >Hi Star, > >One minor comment: >How about update >+ UINT8 MemoryTechnology; ///< >MEMORY_DEVICE_TECHNOLOGY >To >+ UINT8 MemoryTechnology; ///< The = enumeration value >from MEMORY_DEVICE_TECHNOLOGY. >In order to keep consistent with current comments style. > >With this update, Reviewed-by: Dandan Bi > > >Thanks, >Dandan > >-----Original Message----- >From: Zeng, Star >Sent: Thursday, August 23, 2018 11:36 AM >To: edk2-devel@lists.01.org >Cc: Zeng, Star ; Gao, Liming ; = Bi, >Dandan ; Kinney, Michael D > >Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1099 > >Add SMBIOS 3.2.0 definitions according to >www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. > >Processor Information (Type 4): >- SMBIOSCR00163: add socket LGA2066 >- SMBIOSCR00173: add Intel Core i9 >- SMBIOSCR00176: add new processor sockets Port Connector Information >(Type 8): >- SMBIOSCR00168: add USB Type-C >System Slots (Type 9): >- SMBIOSCR00164: add "unavailable" to current usage field >- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): >- SMBIOSCR00162: add support for NVDIMMs >- SMBIOSCR00166: extend support for NVDIMMs and add support for logical >memory type >- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured >Memory Speed" >- SMBIOSCR00174: add new memory technology value (Intel Persistent >Memory, 3D XPoint) IPMI Device Information (Type 38): >- SMBIOSCR00171: add SSIF >Management Controller Host Interface (Type 42) >- SMBIOSCR00175: fix structure data parsing issue > >V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. > >Cc: Liming Gao >Cc: Dandan Bi >Cc: Michael D Kinney >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Star Zeng >--- > MdePkg/Include/IndustryStandard/SmBios.h | 155 >++++++++++++++++++++++++------- > 1 file changed, 120 insertions(+), 35 deletions(-) > >diff --git a/MdePkg/Include/IndustryStandard/SmBios.h >b/MdePkg/Include/IndustryStandard/SmBios.h >index 5d0442873dfc..61e2f9421f97 100644 >--- a/MdePkg/Include/IndustryStandard/SmBios.h >+++ b/MdePkg/Include/IndustryStandard/SmBios.h >@@ -1,5 +1,5 @@ > /** @file >- Industry Standard Definitions of SMBIOS Table Specification v3.1.1. >+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0. > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
>@@ -685,6 +685,7 @@ typedef enum { > ProcessorFamilyzArchitecture =3D 0xCC, > ProcessorFamilyIntelCoreI5 =3D 0xCD, > ProcessorFamilyIntelCoreI3 =3D 0xCE, >+ ProcessorFamilyIntelCoreI9 =3D 0xCF, > ProcessorFamilyViaC7M =3D 0xD2, > ProcessorFamilyViaC7D =3D 0xD3, > ProcessorFamilyViaC7 =3D 0xD4, >@@ -806,7 +807,11 @@ typedef enum { > ProcessorUpgradeSocketBGA1515 =3D 0x35, > ProcessorUpgradeSocketLGA3647_1 =3D 0x36, > ProcessorUpgradeSocketSP3 =3D 0x37, >- ProcessorUpgradeSocketSP3r2 =3D 0x38 >+ ProcessorUpgradeSocketSP3r2 =3D 0x38, >+ ProcessorUpgradeSocketLGA2066 =3D 0x39, >+ ProcessorUpgradeSocketBGA1392 =3D 0x3A, >+ ProcessorUpgradeSocketBGA1510 =3D 0x3B, >+ ProcessorUpgradeSocketBGA1528 =3D 0x3C > } PROCESSOR_UPGRADE; > > /// >@@ -1159,6 +1164,7 @@ typedef enum { > PortConnectorTypeBNC =3D 0x20, > PortConnectorType1394 =3D 0x21, > PortConnectorTypeSasSata =3D 0x22, >+ PortConnectorTypeUsbTypeC =3D 0x23, > PortConnectorTypePC98 =3D 0xA0, > PortConnectorTypePC98Hireso =3D 0xA1, > PortConnectorTypePCH98 =3D 0xA2, >@@ -1205,6 +1211,8 @@ typedef enum { > PortTypeNetworkPort =3D 0x1F, > PortTypeSata =3D 0x20, > PortTypeSas =3D 0x21, >+ PortTypeMfdp =3D 0x22, ///< Multi-Function Display= Port >+ PortTypeThunderbolt =3D 0x23, > PortType8251Compatible =3D 0xA0, > PortType8251FifoCompatible =3D 0xA1, > PortTypeOther =3D 0xFF >@@ -1314,10 +1322,11 @@ typedef enum { > /// System Slots - Current Usage. > /// > typedef enum { >- SlotUsageOther =3D 0x01, >- SlotUsageUnknown =3D 0x02, >- SlotUsageAvailable =3D 0x03, >- SlotUsageInUse =3D 0x04 >+ SlotUsageOther =3D 0x01, >+ SlotUsageUnknown =3D 0x02, >+ SlotUsageAvailable =3D 0x03, >+ SlotUsageInUse =3D 0x04, >+ SlotUsageUnavailable =3D 0x05 > } MISC_SLOT_USAGE; > > /// >@@ -1350,10 +1359,21 @@ typedef struct { > UINT8 PmeSignalSupported :1; > UINT8 HotPlugDevicesSupported :1; > UINT8 SmbusSignalSupported :1; >- UINT8 Reserved :5; ///< Set to 0. >+ UINT8 BifurcationSupported :1; >+ UINT8 Reserved :4; ///< Set to 0. > } MISC_SLOT_CHARACTERISTICS2; > > /// >+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups /// >+typedef struct { >+ UINT16 SegmentGroupNum; >+ UINT8 BusNum; >+ UINT8 DevFuncNum; >+ UINT8 DataBusWidth; >+} MISC_SLOT_PEER_GROUP; >+ >+/// > /// System Slots (Type 9) > /// > /// The information in this structure defines the attributes of a system = slot. >@@ -1376,6 +1396,12 @@ typedef struct { > UINT16 SegmentGroupNum; > UINT8 BusNum; > UINT8 DevFuncNum; >+ // >+ // Add for smbios 3.2 >+ // >+ UINT8 DataBusWidth; >+ UINT8 PeerGroupingCount; >+ MISC_SLOT_PEER_GROUP PeerGroups[1]; > } SMBIOS_TABLE_TYPE9; > > /// >@@ -1668,9 +1694,13 @@ typedef enum { > MemoryTypeLpddr =3D 0x1B, > MemoryTypeLpddr2 =3D 0x1C, > MemoryTypeLpddr3 =3D 0x1D, >- MemoryTypeLpddr4 =3D 0x1E >+ MemoryTypeLpddr4 =3D 0x1E, >+ MemoryTypeLogicalNonVolatileDevice =3D 0x1F > } MEMORY_DEVICE_TYPE; > >+/// >+/// Memory Device - Type Detail >+/// > typedef struct { > UINT16 Reserved :1; > UINT16 Other :1; >@@ -1691,6 +1721,41 @@ typedef struct { > } MEMORY_DEVICE_TYPE_DETAIL; > > /// >+/// Memory Device - Memory Technology >+/// >+typedef enum { >+ MemoryTechnologyOther =3D 0x01, >+ MemoryTechnologyUnknown =3D 0x02, >+ MemoryTechnologyDram =3D 0x03, >+ MemoryTechnologyNvdimmN =3D 0x04, >+ MemoryTechnologyNvdimmF =3D 0x05, >+ MemoryTechnologyNvdimmP =3D 0x06, >+ MemoryTechnologyIntelPersistentMemory =3D 0x07 >+} MEMORY_DEVICE_TECHNOLOGY; >+ >+/// >+/// Memory Device - Memory Operating Mode Capability /// typedef union >+{ >+ /// >+ /// Individual bit fields >+ /// >+ struct { >+ UINT16 Reserved :1; ///< Set to 0. >+ UINT16 Other :1; >+ UINT16 Unknown :1; >+ UINT16 VolatileMemory :1; >+ UINT16 ByteAccessiblePersistentMemory :1; >+ UINT16 BlockAccessiblePersistentMemory :1; >+ UINT16 Reserved2 :10; ///< Set to 0. >+ } Bits; >+ /// >+ /// All bit fields as a 16-bit value >+ /// >+ UINT16 Uint16; >+} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; >+ >+/// > /// Memory Device (Type 17). > /// > /// This structure describes a single memory device that is part of @@ - >1700,38 +1765,57 @@ typedef struct { /// socket is currently populated. > /// > typedef struct { >- SMBIOS_STRUCTURE Hdr; >- UINT16 MemoryArrayHandle; >- UINT16 MemoryErrorInformationHandle; >- UINT16 TotalWidth; >- UINT16 DataWidth; >- UINT16 Size; >- UINT8 FormFactor; ///< The enum= eration value from >MEMORY_FORM_FACTOR. >- UINT8 DeviceSet; >- SMBIOS_TABLE_STRING DeviceLocator; >- SMBIOS_TABLE_STRING BankLocator; >- UINT8 MemoryType; ///< The enum= eration value from >MEMORY_DEVICE_TYPE. >- MEMORY_DEVICE_TYPE_DETAIL TypeDetail; >- UINT16 Speed; >- SMBIOS_TABLE_STRING Manufacturer; >- SMBIOS_TABLE_STRING SerialNumber; >- SMBIOS_TABLE_STRING AssetTag; >- SMBIOS_TABLE_STRING PartNumber; >+ SMBIOS_STRUCTURE Hdr; >+ UINT16 MemoryArrayHandle; >+ UINT16 MemoryErrorInformationHandle; >+ UINT16 TotalWidth; >+ UINT16 DataWidth; >+ UINT16 Size; >+ UINT8 FormFactor; ///< The = enumeration value from >MEMORY_FORM_FACTOR. >+ UINT8 DeviceSet; >+ SMBIOS_TABLE_STRING DeviceLocator; >+ SMBIOS_TABLE_STRING BankLocator; >+ UINT8 MemoryType; ///< The = enumeration value >from MEMORY_DEVICE_TYPE. >+ MEMORY_DEVICE_TYPE_DETAIL TypeDetail; >+ UINT16 Speed; >+ SMBIOS_TABLE_STRING Manufacturer; >+ SMBIOS_TABLE_STRING SerialNumber; >+ SMBIOS_TABLE_STRING AssetTag; >+ SMBIOS_TABLE_STRING PartNumber; > // > // Add for smbios 2.6 > // >- UINT8 Attributes; >+ UINT8 Attributes; > // > // Add for smbios 2.7 > // >- UINT32 ExtendedSize; >- UINT16 ConfiguredMemoryClockSpeed; >+ UINT32 ExtendedSize; >+ // >+ // Keep using name "ConfiguredMemoryClockSpeed" for compatibility // >+ although this field is renamed from "Configured Memory Clock Speed" >+ // to "Configured Memory Speed" in smbios 3.2.0. >+ // >+ UINT16 ConfiguredMemoryClockSpeed; > // > // Add for smbios 2.8.0 > // >- UINT16 MinimumVoltage; >- UINT16 MaximumVoltage; >- UINT16 ConfiguredVoltage; >+ UINT16 MinimumVoltage; >+ UINT16 MaximumVoltage; >+ UINT16 ConfiguredVoltage; >+ // >+ // Add for smbios 3.2.0 >+ // >+ UINT8 MemoryTechnology; ///< >MEMORY_DEVICE_TECHNOLOGY >+ MEMORY_DEVICE_OPERATING_MODE_CAPABILITY >MemoryOperatingModeCapability; >+ SMBIOS_TABLE_STRING FirwareVersion; >+ UINT16 ModuleManufacturerID; >+ UINT16 ModuleProductID; >+ UINT16 MemorySubsystemControllerManu= facturerID; >+ UINT16 MemorySubsystemControllerProd= uctID; >+ UINT64 NonVolatileSize; >+ UINT64 VolatileSize; >+ UINT64 CacheSize; >+ UINT64 LogicalSize; > } SMBIOS_TABLE_TYPE17; > > /// >@@ -2269,7 +2353,7 @@ typedef enum { > IPMIDeviceInfoInterfaceTypeKCS =3D 0x01, ///< The Keyboard Co= ntroller >Style. > IPMIDeviceInfoInterfaceTypeSMIC =3D 0x02, ///< The Server >Management Interface Chip. > IPMIDeviceInfoInterfaceTypeBT =3D 0x03, ///< The Block Trans= fer >- IPMIDeviceInfoInterfaceTypeReserved =3D 0x04 >+ IPMIDeviceInfoInterfaceTypeSSIF =3D 0x04 ///< SMBus System In= terface > } BMC_INTERFACE_TYPE; > > /// >@@ -2339,7 +2423,7 @@ typedef struct { > UINT8 ReferencedOffset; > SMBIOS_TABLE_STRING EntryString; > UINT8 Value[1]; >-}ADDITIONAL_INFORMATION_ENTRY; >+} ADDITIONAL_INFORMATION_ENTRY; > > /// > /// Additional Information (Type 40). >@@ -2425,8 +2509,9 @@ typedef enum{ > /// > typedef struct { > SMBIOS_STRUCTURE Hdr; >- UINT8 InterfaceType; ///< The enum= eration value from >MC_HOST_INTERFACE_TYPE >- UINT8 MCHostInterfaceData[1]; ///< This fie= ld has a minimum >of four bytes >+ UINT8 InterfaceType; ///< = The enumeration value >from MC_HOST_INTERFACE_TYPE >+ UINT8 InterfaceTypeSpecificDataLength; >+ UINT8 InterfaceTypeSpecificData[4]; ///< = This field has a >minimum of four bytes > } SMBIOS_TABLE_TYPE42; > > /// >-- >2.7.0.windows.1