* [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions @ 2018-08-23 3:36 Star Zeng 2018-08-23 3:36 ` [PATCH V2 1/2] MdePkg SmBios.h: " Star Zeng 2018-08-23 3:36 ` [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 Star Zeng 0 siblings, 2 replies; 7+ messages in thread From: Star Zeng @ 2018-08-23 3:36 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng https://bugzilla.tianocore.org/show_bug.cgi?id=1099 This patch series updates 1. MdePkg/Include/IndustryStandard/Smbios.h 2. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion and gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9 in PATCH V2 1/2. Star Zeng (2): MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions MdeModulePkg: Update SMBIOS PCDs to 3.2.0 MdeModulePkg/MdeModulePkg.dec | 4 +- MdePkg/Include/IndustryStandard/SmBios.h | 155 ++++++++++++++++++++++++------- 2 files changed, 122 insertions(+), 37 deletions(-) -- 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions 2018-08-23 3:36 [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions Star Zeng @ 2018-08-23 3:36 ` Star Zeng 2018-08-27 1:00 ` Bi, Dandan 2018-08-23 3:36 ` [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 Star Zeng 1 sibling, 1 reply; 7+ messages in thread From: Star Zeng @ 2018-08-23 3:36 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng, Liming Gao, Dandan Bi, Michael D Kinney REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> --- MdePkg/Include/IndustryStandard/SmBios.h | 155 ++++++++++++++++++++++++------- 1 file changed, 120 insertions(+), 35 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index 5d0442873dfc..61e2f9421f97 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1,5 +1,5 @@ /** @file - Industry Standard Definitions of SMBIOS Table Specification v3.1.1. + Industry Standard Definitions of SMBIOS Table Specification v3.2.0. Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR> @@ -685,6 +685,7 @@ typedef enum { ProcessorFamilyzArchitecture = 0xCC, ProcessorFamilyIntelCoreI5 = 0xCD, ProcessorFamilyIntelCoreI3 = 0xCE, + ProcessorFamilyIntelCoreI9 = 0xCF, ProcessorFamilyViaC7M = 0xD2, ProcessorFamilyViaC7D = 0xD3, ProcessorFamilyViaC7 = 0xD4, @@ -806,7 +807,11 @@ typedef enum { ProcessorUpgradeSocketBGA1515 = 0x35, ProcessorUpgradeSocketLGA3647_1 = 0x36, ProcessorUpgradeSocketSP3 = 0x37, - ProcessorUpgradeSocketSP3r2 = 0x38 + ProcessorUpgradeSocketSP3r2 = 0x38, + ProcessorUpgradeSocketLGA2066 = 0x39, + ProcessorUpgradeSocketBGA1392 = 0x3A, + ProcessorUpgradeSocketBGA1510 = 0x3B, + ProcessorUpgradeSocketBGA1528 = 0x3C } PROCESSOR_UPGRADE; /// @@ -1159,6 +1164,7 @@ typedef enum { PortConnectorTypeBNC = 0x20, PortConnectorType1394 = 0x21, PortConnectorTypeSasSata = 0x22, + PortConnectorTypeUsbTypeC = 0x23, PortConnectorTypePC98 = 0xA0, PortConnectorTypePC98Hireso = 0xA1, PortConnectorTypePCH98 = 0xA2, @@ -1205,6 +1211,8 @@ typedef enum { PortTypeNetworkPort = 0x1F, PortTypeSata = 0x20, PortTypeSas = 0x21, + PortTypeMfdp = 0x22, ///< Multi-Function Display Port + PortTypeThunderbolt = 0x23, PortType8251Compatible = 0xA0, PortType8251FifoCompatible = 0xA1, PortTypeOther = 0xFF @@ -1314,10 +1322,11 @@ typedef enum { /// System Slots - Current Usage. /// typedef enum { - SlotUsageOther = 0x01, - SlotUsageUnknown = 0x02, - SlotUsageAvailable = 0x03, - SlotUsageInUse = 0x04 + SlotUsageOther = 0x01, + SlotUsageUnknown = 0x02, + SlotUsageAvailable = 0x03, + SlotUsageInUse = 0x04, + SlotUsageUnavailable = 0x05 } MISC_SLOT_USAGE; /// @@ -1350,10 +1359,21 @@ typedef struct { UINT8 PmeSignalSupported :1; UINT8 HotPlugDevicesSupported :1; UINT8 SmbusSignalSupported :1; - UINT8 Reserved :5; ///< Set to 0. + UINT8 BifurcationSupported :1; + UINT8 Reserved :4; ///< Set to 0. } MISC_SLOT_CHARACTERISTICS2; /// +/// System Slots - Peer Segment/Bus/Device/Function/Width Groups +/// +typedef struct { + UINT16 SegmentGroupNum; + UINT8 BusNum; + UINT8 DevFuncNum; + UINT8 DataBusWidth; +} MISC_SLOT_PEER_GROUP; + +/// /// System Slots (Type 9) /// /// The information in this structure defines the attributes of a system slot. @@ -1376,6 +1396,12 @@ typedef struct { UINT16 SegmentGroupNum; UINT8 BusNum; UINT8 DevFuncNum; + // + // Add for smbios 3.2 + // + UINT8 DataBusWidth; + UINT8 PeerGroupingCount; + MISC_SLOT_PEER_GROUP PeerGroups[1]; } SMBIOS_TABLE_TYPE9; /// @@ -1668,9 +1694,13 @@ typedef enum { MemoryTypeLpddr = 0x1B, MemoryTypeLpddr2 = 0x1C, MemoryTypeLpddr3 = 0x1D, - MemoryTypeLpddr4 = 0x1E + MemoryTypeLpddr4 = 0x1E, + MemoryTypeLogicalNonVolatileDevice = 0x1F } MEMORY_DEVICE_TYPE; +/// +/// Memory Device - Type Detail +/// typedef struct { UINT16 Reserved :1; UINT16 Other :1; @@ -1691,6 +1721,41 @@ typedef struct { } MEMORY_DEVICE_TYPE_DETAIL; /// +/// Memory Device - Memory Technology +/// +typedef enum { + MemoryTechnologyOther = 0x01, + MemoryTechnologyUnknown = 0x02, + MemoryTechnologyDram = 0x03, + MemoryTechnologyNvdimmN = 0x04, + MemoryTechnologyNvdimmF = 0x05, + MemoryTechnologyNvdimmP = 0x06, + MemoryTechnologyIntelPersistentMemory = 0x07 +} MEMORY_DEVICE_TECHNOLOGY; + +/// +/// Memory Device - Memory Operating Mode Capability +/// +typedef union { + /// + /// Individual bit fields + /// + struct { + UINT16 Reserved :1; ///< Set to 0. + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 VolatileMemory :1; + UINT16 ByteAccessiblePersistentMemory :1; + UINT16 BlockAccessiblePersistentMemory :1; + UINT16 Reserved2 :10; ///< Set to 0. + } Bits; + /// + /// All bit fields as a 16-bit value + /// + UINT16 Uint16; +} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; + +/// /// Memory Device (Type 17). /// /// This structure describes a single memory device that is part of @@ -1700,38 +1765,57 @@ typedef struct { /// socket is currently populated. /// typedef struct { - SMBIOS_STRUCTURE Hdr; - UINT16 MemoryArrayHandle; - UINT16 MemoryErrorInformationHandle; - UINT16 TotalWidth; - UINT16 DataWidth; - UINT16 Size; - UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. - UINT8 DeviceSet; - SMBIOS_TABLE_STRING DeviceLocator; - SMBIOS_TABLE_STRING BankLocator; - UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. - MEMORY_DEVICE_TYPE_DETAIL TypeDetail; - UINT16 Speed; - SMBIOS_TABLE_STRING Manufacturer; - SMBIOS_TABLE_STRING SerialNumber; - SMBIOS_TABLE_STRING AssetTag; - SMBIOS_TABLE_STRING PartNumber; + SMBIOS_STRUCTURE Hdr; + UINT16 MemoryArrayHandle; + UINT16 MemoryErrorInformationHandle; + UINT16 TotalWidth; + UINT16 DataWidth; + UINT16 Size; + UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. + UINT8 DeviceSet; + SMBIOS_TABLE_STRING DeviceLocator; + SMBIOS_TABLE_STRING BankLocator; + UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. + MEMORY_DEVICE_TYPE_DETAIL TypeDetail; + UINT16 Speed; + SMBIOS_TABLE_STRING Manufacturer; + SMBIOS_TABLE_STRING SerialNumber; + SMBIOS_TABLE_STRING AssetTag; + SMBIOS_TABLE_STRING PartNumber; // // Add for smbios 2.6 // - UINT8 Attributes; + UINT8 Attributes; // // Add for smbios 2.7 // - UINT32 ExtendedSize; - UINT16 ConfiguredMemoryClockSpeed; + UINT32 ExtendedSize; + // + // Keep using name "ConfiguredMemoryClockSpeed" for compatibility + // although this field is renamed from "Configured Memory Clock Speed" + // to "Configured Memory Speed" in smbios 3.2.0. + // + UINT16 ConfiguredMemoryClockSpeed; // // Add for smbios 2.8.0 // - UINT16 MinimumVoltage; - UINT16 MaximumVoltage; - UINT16 ConfiguredVoltage; + UINT16 MinimumVoltage; + UINT16 MaximumVoltage; + UINT16 ConfiguredVoltage; + // + // Add for smbios 3.2.0 + // + UINT8 MemoryTechnology; ///< MEMORY_DEVICE_TECHNOLOGY + MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability; + SMBIOS_TABLE_STRING FirwareVersion; + UINT16 ModuleManufacturerID; + UINT16 ModuleProductID; + UINT16 MemorySubsystemControllerManufacturerID; + UINT16 MemorySubsystemControllerProductID; + UINT64 NonVolatileSize; + UINT64 VolatileSize; + UINT64 CacheSize; + UINT64 LogicalSize; } SMBIOS_TABLE_TYPE17; /// @@ -2269,7 +2353,7 @@ typedef enum { IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style. IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip. IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer - IPMIDeviceInfoInterfaceTypeReserved = 0x04 + IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface } BMC_INTERFACE_TYPE; /// @@ -2339,7 +2423,7 @@ typedef struct { UINT8 ReferencedOffset; SMBIOS_TABLE_STRING EntryString; UINT8 Value[1]; -}ADDITIONAL_INFORMATION_ENTRY; +} ADDITIONAL_INFORMATION_ENTRY; /// /// Additional Information (Type 40). @@ -2425,8 +2509,9 @@ typedef enum{ /// typedef struct { SMBIOS_STRUCTURE Hdr; - UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE - UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes + UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE + UINT8 InterfaceTypeSpecificDataLength; + UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; /// -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions 2018-08-23 3:36 ` [PATCH V2 1/2] MdePkg SmBios.h: " Star Zeng @ 2018-08-27 1:00 ` Bi, Dandan 2018-08-27 1:06 ` Zeng, Star 0 siblings, 1 reply; 7+ messages in thread From: Bi, Dandan @ 2018-08-27 1:00 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org; +Cc: Gao, Liming, Kinney, Michael D Hi Star, One minor comment: How about update + UINT8 MemoryTechnology; ///< MEMORY_DEVICE_TECHNOLOGY To + UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY. In order to keep consistent with current comments style. With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com> Thanks, Dandan -----Original Message----- From: Zeng, Star Sent: Thursday, August 23, 2018 11:36 AM To: edk2-devel@lists.01.org Cc: Zeng, Star <star.zeng@intel.com>; Gao, Liming <liming.gao@intel.com>; Bi, Dandan <dandan.bi@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com> Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> --- MdePkg/Include/IndustryStandard/SmBios.h | 155 ++++++++++++++++++++++++------- 1 file changed, 120 insertions(+), 35 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index 5d0442873dfc..61e2f9421f97 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1,5 +1,5 @@ /** @file - Industry Standard Definitions of SMBIOS Table Specification v3.1.1. + Industry Standard Definitions of SMBIOS Table Specification v3.2.0. Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR> @@ -685,6 +685,7 @@ typedef enum { ProcessorFamilyzArchitecture = 0xCC, ProcessorFamilyIntelCoreI5 = 0xCD, ProcessorFamilyIntelCoreI3 = 0xCE, + ProcessorFamilyIntelCoreI9 = 0xCF, ProcessorFamilyViaC7M = 0xD2, ProcessorFamilyViaC7D = 0xD3, ProcessorFamilyViaC7 = 0xD4, @@ -806,7 +807,11 @@ typedef enum { ProcessorUpgradeSocketBGA1515 = 0x35, ProcessorUpgradeSocketLGA3647_1 = 0x36, ProcessorUpgradeSocketSP3 = 0x37, - ProcessorUpgradeSocketSP3r2 = 0x38 + ProcessorUpgradeSocketSP3r2 = 0x38, + ProcessorUpgradeSocketLGA2066 = 0x39, + ProcessorUpgradeSocketBGA1392 = 0x3A, + ProcessorUpgradeSocketBGA1510 = 0x3B, + ProcessorUpgradeSocketBGA1528 = 0x3C } PROCESSOR_UPGRADE; /// @@ -1159,6 +1164,7 @@ typedef enum { PortConnectorTypeBNC = 0x20, PortConnectorType1394 = 0x21, PortConnectorTypeSasSata = 0x22, + PortConnectorTypeUsbTypeC = 0x23, PortConnectorTypePC98 = 0xA0, PortConnectorTypePC98Hireso = 0xA1, PortConnectorTypePCH98 = 0xA2, @@ -1205,6 +1211,8 @@ typedef enum { PortTypeNetworkPort = 0x1F, PortTypeSata = 0x20, PortTypeSas = 0x21, + PortTypeMfdp = 0x22, ///< Multi-Function Display Port + PortTypeThunderbolt = 0x23, PortType8251Compatible = 0xA0, PortType8251FifoCompatible = 0xA1, PortTypeOther = 0xFF @@ -1314,10 +1322,11 @@ typedef enum { /// System Slots - Current Usage. /// typedef enum { - SlotUsageOther = 0x01, - SlotUsageUnknown = 0x02, - SlotUsageAvailable = 0x03, - SlotUsageInUse = 0x04 + SlotUsageOther = 0x01, + SlotUsageUnknown = 0x02, + SlotUsageAvailable = 0x03, + SlotUsageInUse = 0x04, + SlotUsageUnavailable = 0x05 } MISC_SLOT_USAGE; /// @@ -1350,10 +1359,21 @@ typedef struct { UINT8 PmeSignalSupported :1; UINT8 HotPlugDevicesSupported :1; UINT8 SmbusSignalSupported :1; - UINT8 Reserved :5; ///< Set to 0. + UINT8 BifurcationSupported :1; + UINT8 Reserved :4; ///< Set to 0. } MISC_SLOT_CHARACTERISTICS2; /// +/// System Slots - Peer Segment/Bus/Device/Function/Width Groups /// +typedef struct { + UINT16 SegmentGroupNum; + UINT8 BusNum; + UINT8 DevFuncNum; + UINT8 DataBusWidth; +} MISC_SLOT_PEER_GROUP; + +/// /// System Slots (Type 9) /// /// The information in this structure defines the attributes of a system slot. @@ -1376,6 +1396,12 @@ typedef struct { UINT16 SegmentGroupNum; UINT8 BusNum; UINT8 DevFuncNum; + // + // Add for smbios 3.2 + // + UINT8 DataBusWidth; + UINT8 PeerGroupingCount; + MISC_SLOT_PEER_GROUP PeerGroups[1]; } SMBIOS_TABLE_TYPE9; /// @@ -1668,9 +1694,13 @@ typedef enum { MemoryTypeLpddr = 0x1B, MemoryTypeLpddr2 = 0x1C, MemoryTypeLpddr3 = 0x1D, - MemoryTypeLpddr4 = 0x1E + MemoryTypeLpddr4 = 0x1E, + MemoryTypeLogicalNonVolatileDevice = 0x1F } MEMORY_DEVICE_TYPE; +/// +/// Memory Device - Type Detail +/// typedef struct { UINT16 Reserved :1; UINT16 Other :1; @@ -1691,6 +1721,41 @@ typedef struct { } MEMORY_DEVICE_TYPE_DETAIL; /// +/// Memory Device - Memory Technology +/// +typedef enum { + MemoryTechnologyOther = 0x01, + MemoryTechnologyUnknown = 0x02, + MemoryTechnologyDram = 0x03, + MemoryTechnologyNvdimmN = 0x04, + MemoryTechnologyNvdimmF = 0x05, + MemoryTechnologyNvdimmP = 0x06, + MemoryTechnologyIntelPersistentMemory = 0x07 +} MEMORY_DEVICE_TECHNOLOGY; + +/// +/// Memory Device - Memory Operating Mode Capability /// typedef union +{ + /// + /// Individual bit fields + /// + struct { + UINT16 Reserved :1; ///< Set to 0. + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 VolatileMemory :1; + UINT16 ByteAccessiblePersistentMemory :1; + UINT16 BlockAccessiblePersistentMemory :1; + UINT16 Reserved2 :10; ///< Set to 0. + } Bits; + /// + /// All bit fields as a 16-bit value + /// + UINT16 Uint16; +} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; + +/// /// Memory Device (Type 17). /// /// This structure describes a single memory device that is part of @@ -1700,38 +1765,57 @@ typedef struct { /// socket is currently populated. /// typedef struct { - SMBIOS_STRUCTURE Hdr; - UINT16 MemoryArrayHandle; - UINT16 MemoryErrorInformationHandle; - UINT16 TotalWidth; - UINT16 DataWidth; - UINT16 Size; - UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. - UINT8 DeviceSet; - SMBIOS_TABLE_STRING DeviceLocator; - SMBIOS_TABLE_STRING BankLocator; - UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. - MEMORY_DEVICE_TYPE_DETAIL TypeDetail; - UINT16 Speed; - SMBIOS_TABLE_STRING Manufacturer; - SMBIOS_TABLE_STRING SerialNumber; - SMBIOS_TABLE_STRING AssetTag; - SMBIOS_TABLE_STRING PartNumber; + SMBIOS_STRUCTURE Hdr; + UINT16 MemoryArrayHandle; + UINT16 MemoryErrorInformationHandle; + UINT16 TotalWidth; + UINT16 DataWidth; + UINT16 Size; + UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. + UINT8 DeviceSet; + SMBIOS_TABLE_STRING DeviceLocator; + SMBIOS_TABLE_STRING BankLocator; + UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. + MEMORY_DEVICE_TYPE_DETAIL TypeDetail; + UINT16 Speed; + SMBIOS_TABLE_STRING Manufacturer; + SMBIOS_TABLE_STRING SerialNumber; + SMBIOS_TABLE_STRING AssetTag; + SMBIOS_TABLE_STRING PartNumber; // // Add for smbios 2.6 // - UINT8 Attributes; + UINT8 Attributes; // // Add for smbios 2.7 // - UINT32 ExtendedSize; - UINT16 ConfiguredMemoryClockSpeed; + UINT32 ExtendedSize; + // + // Keep using name "ConfiguredMemoryClockSpeed" for compatibility // + although this field is renamed from "Configured Memory Clock Speed" + // to "Configured Memory Speed" in smbios 3.2.0. + // + UINT16 ConfiguredMemoryClockSpeed; // // Add for smbios 2.8.0 // - UINT16 MinimumVoltage; - UINT16 MaximumVoltage; - UINT16 ConfiguredVoltage; + UINT16 MinimumVoltage; + UINT16 MaximumVoltage; + UINT16 ConfiguredVoltage; + // + // Add for smbios 3.2.0 + // + UINT8 MemoryTechnology; ///< MEMORY_DEVICE_TECHNOLOGY + MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability; + SMBIOS_TABLE_STRING FirwareVersion; + UINT16 ModuleManufacturerID; + UINT16 ModuleProductID; + UINT16 MemorySubsystemControllerManufacturerID; + UINT16 MemorySubsystemControllerProductID; + UINT64 NonVolatileSize; + UINT64 VolatileSize; + UINT64 CacheSize; + UINT64 LogicalSize; } SMBIOS_TABLE_TYPE17; /// @@ -2269,7 +2353,7 @@ typedef enum { IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style. IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip. IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer - IPMIDeviceInfoInterfaceTypeReserved = 0x04 + IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface } BMC_INTERFACE_TYPE; /// @@ -2339,7 +2423,7 @@ typedef struct { UINT8 ReferencedOffset; SMBIOS_TABLE_STRING EntryString; UINT8 Value[1]; -}ADDITIONAL_INFORMATION_ENTRY; +} ADDITIONAL_INFORMATION_ENTRY; /// /// Additional Information (Type 40). @@ -2425,8 +2509,9 @@ typedef enum{ /// typedef struct { SMBIOS_STRUCTURE Hdr; - UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE - UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes + UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE + UINT8 InterfaceTypeSpecificDataLength; + UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; /// -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions 2018-08-27 1:00 ` Bi, Dandan @ 2018-08-27 1:06 ` Zeng, Star 2018-08-28 1:55 ` Gao, Liming 0 siblings, 1 reply; 7+ messages in thread From: Zeng, Star @ 2018-08-27 1:06 UTC (permalink / raw) To: Bi, Dandan, edk2-devel@lists.01.org Cc: Gao, Liming, Kinney, Michael D, Zeng, Star Agree and thanks. Star -----Original Message----- From: Bi, Dandan Sent: Monday, August 27, 2018 9:00 AM To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com> Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions Hi Star, One minor comment: How about update + UINT8 MemoryTechnology; ///< MEMORY_DEVICE_TECHNOLOGY To + UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY. In order to keep consistent with current comments style. With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com> Thanks, Dandan -----Original Message----- From: Zeng, Star Sent: Thursday, August 23, 2018 11:36 AM To: edk2-devel@lists.01.org Cc: Zeng, Star <star.zeng@intel.com>; Gao, Liming <liming.gao@intel.com>; Bi, Dandan <dandan.bi@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com> Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> --- MdePkg/Include/IndustryStandard/SmBios.h | 155 ++++++++++++++++++++++++------- 1 file changed, 120 insertions(+), 35 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index 5d0442873dfc..61e2f9421f97 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1,5 +1,5 @@ /** @file - Industry Standard Definitions of SMBIOS Table Specification v3.1.1. + Industry Standard Definitions of SMBIOS Table Specification v3.2.0. Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR> @@ -685,6 +685,7 @@ typedef enum { ProcessorFamilyzArchitecture = 0xCC, ProcessorFamilyIntelCoreI5 = 0xCD, ProcessorFamilyIntelCoreI3 = 0xCE, + ProcessorFamilyIntelCoreI9 = 0xCF, ProcessorFamilyViaC7M = 0xD2, ProcessorFamilyViaC7D = 0xD3, ProcessorFamilyViaC7 = 0xD4, @@ -806,7 +807,11 @@ typedef enum { ProcessorUpgradeSocketBGA1515 = 0x35, ProcessorUpgradeSocketLGA3647_1 = 0x36, ProcessorUpgradeSocketSP3 = 0x37, - ProcessorUpgradeSocketSP3r2 = 0x38 + ProcessorUpgradeSocketSP3r2 = 0x38, + ProcessorUpgradeSocketLGA2066 = 0x39, + ProcessorUpgradeSocketBGA1392 = 0x3A, + ProcessorUpgradeSocketBGA1510 = 0x3B, + ProcessorUpgradeSocketBGA1528 = 0x3C } PROCESSOR_UPGRADE; /// @@ -1159,6 +1164,7 @@ typedef enum { PortConnectorTypeBNC = 0x20, PortConnectorType1394 = 0x21, PortConnectorTypeSasSata = 0x22, + PortConnectorTypeUsbTypeC = 0x23, PortConnectorTypePC98 = 0xA0, PortConnectorTypePC98Hireso = 0xA1, PortConnectorTypePCH98 = 0xA2, @@ -1205,6 +1211,8 @@ typedef enum { PortTypeNetworkPort = 0x1F, PortTypeSata = 0x20, PortTypeSas = 0x21, + PortTypeMfdp = 0x22, ///< Multi-Function Display Port + PortTypeThunderbolt = 0x23, PortType8251Compatible = 0xA0, PortType8251FifoCompatible = 0xA1, PortTypeOther = 0xFF @@ -1314,10 +1322,11 @@ typedef enum { /// System Slots - Current Usage. /// typedef enum { - SlotUsageOther = 0x01, - SlotUsageUnknown = 0x02, - SlotUsageAvailable = 0x03, - SlotUsageInUse = 0x04 + SlotUsageOther = 0x01, + SlotUsageUnknown = 0x02, + SlotUsageAvailable = 0x03, + SlotUsageInUse = 0x04, + SlotUsageUnavailable = 0x05 } MISC_SLOT_USAGE; /// @@ -1350,10 +1359,21 @@ typedef struct { UINT8 PmeSignalSupported :1; UINT8 HotPlugDevicesSupported :1; UINT8 SmbusSignalSupported :1; - UINT8 Reserved :5; ///< Set to 0. + UINT8 BifurcationSupported :1; + UINT8 Reserved :4; ///< Set to 0. } MISC_SLOT_CHARACTERISTICS2; /// +/// System Slots - Peer Segment/Bus/Device/Function/Width Groups /// +typedef struct { + UINT16 SegmentGroupNum; + UINT8 BusNum; + UINT8 DevFuncNum; + UINT8 DataBusWidth; +} MISC_SLOT_PEER_GROUP; + +/// /// System Slots (Type 9) /// /// The information in this structure defines the attributes of a system slot. @@ -1376,6 +1396,12 @@ typedef struct { UINT16 SegmentGroupNum; UINT8 BusNum; UINT8 DevFuncNum; + // + // Add for smbios 3.2 + // + UINT8 DataBusWidth; + UINT8 PeerGroupingCount; + MISC_SLOT_PEER_GROUP PeerGroups[1]; } SMBIOS_TABLE_TYPE9; /// @@ -1668,9 +1694,13 @@ typedef enum { MemoryTypeLpddr = 0x1B, MemoryTypeLpddr2 = 0x1C, MemoryTypeLpddr3 = 0x1D, - MemoryTypeLpddr4 = 0x1E + MemoryTypeLpddr4 = 0x1E, + MemoryTypeLogicalNonVolatileDevice = 0x1F } MEMORY_DEVICE_TYPE; +/// +/// Memory Device - Type Detail +/// typedef struct { UINT16 Reserved :1; UINT16 Other :1; @@ -1691,6 +1721,41 @@ typedef struct { } MEMORY_DEVICE_TYPE_DETAIL; /// +/// Memory Device - Memory Technology +/// +typedef enum { + MemoryTechnologyOther = 0x01, + MemoryTechnologyUnknown = 0x02, + MemoryTechnologyDram = 0x03, + MemoryTechnologyNvdimmN = 0x04, + MemoryTechnologyNvdimmF = 0x05, + MemoryTechnologyNvdimmP = 0x06, + MemoryTechnologyIntelPersistentMemory = 0x07 +} MEMORY_DEVICE_TECHNOLOGY; + +/// +/// Memory Device - Memory Operating Mode Capability /// typedef union +{ + /// + /// Individual bit fields + /// + struct { + UINT16 Reserved :1; ///< Set to 0. + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 VolatileMemory :1; + UINT16 ByteAccessiblePersistentMemory :1; + UINT16 BlockAccessiblePersistentMemory :1; + UINT16 Reserved2 :10; ///< Set to 0. + } Bits; + /// + /// All bit fields as a 16-bit value + /// + UINT16 Uint16; +} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; + +/// /// Memory Device (Type 17). /// /// This structure describes a single memory device that is part of @@ -1700,38 +1765,57 @@ typedef struct { /// socket is currently populated. /// typedef struct { - SMBIOS_STRUCTURE Hdr; - UINT16 MemoryArrayHandle; - UINT16 MemoryErrorInformationHandle; - UINT16 TotalWidth; - UINT16 DataWidth; - UINT16 Size; - UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. - UINT8 DeviceSet; - SMBIOS_TABLE_STRING DeviceLocator; - SMBIOS_TABLE_STRING BankLocator; - UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. - MEMORY_DEVICE_TYPE_DETAIL TypeDetail; - UINT16 Speed; - SMBIOS_TABLE_STRING Manufacturer; - SMBIOS_TABLE_STRING SerialNumber; - SMBIOS_TABLE_STRING AssetTag; - SMBIOS_TABLE_STRING PartNumber; + SMBIOS_STRUCTURE Hdr; + UINT16 MemoryArrayHandle; + UINT16 MemoryErrorInformationHandle; + UINT16 TotalWidth; + UINT16 DataWidth; + UINT16 Size; + UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. + UINT8 DeviceSet; + SMBIOS_TABLE_STRING DeviceLocator; + SMBIOS_TABLE_STRING BankLocator; + UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. + MEMORY_DEVICE_TYPE_DETAIL TypeDetail; + UINT16 Speed; + SMBIOS_TABLE_STRING Manufacturer; + SMBIOS_TABLE_STRING SerialNumber; + SMBIOS_TABLE_STRING AssetTag; + SMBIOS_TABLE_STRING PartNumber; // // Add for smbios 2.6 // - UINT8 Attributes; + UINT8 Attributes; // // Add for smbios 2.7 // - UINT32 ExtendedSize; - UINT16 ConfiguredMemoryClockSpeed; + UINT32 ExtendedSize; + // + // Keep using name "ConfiguredMemoryClockSpeed" for compatibility // + although this field is renamed from "Configured Memory Clock Speed" + // to "Configured Memory Speed" in smbios 3.2.0. + // + UINT16 ConfiguredMemoryClockSpeed; // // Add for smbios 2.8.0 // - UINT16 MinimumVoltage; - UINT16 MaximumVoltage; - UINT16 ConfiguredVoltage; + UINT16 MinimumVoltage; + UINT16 MaximumVoltage; + UINT16 ConfiguredVoltage; + // + // Add for smbios 3.2.0 + // + UINT8 MemoryTechnology; ///< MEMORY_DEVICE_TECHNOLOGY + MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability; + SMBIOS_TABLE_STRING FirwareVersion; + UINT16 ModuleManufacturerID; + UINT16 ModuleProductID; + UINT16 MemorySubsystemControllerManufacturerID; + UINT16 MemorySubsystemControllerProductID; + UINT64 NonVolatileSize; + UINT64 VolatileSize; + UINT64 CacheSize; + UINT64 LogicalSize; } SMBIOS_TABLE_TYPE17; /// @@ -2269,7 +2353,7 @@ typedef enum { IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style. IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip. IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer - IPMIDeviceInfoInterfaceTypeReserved = 0x04 + IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface } BMC_INTERFACE_TYPE; /// @@ -2339,7 +2423,7 @@ typedef struct { UINT8 ReferencedOffset; SMBIOS_TABLE_STRING EntryString; UINT8 Value[1]; -}ADDITIONAL_INFORMATION_ENTRY; +} ADDITIONAL_INFORMATION_ENTRY; /// /// Additional Information (Type 40). @@ -2425,8 +2509,9 @@ typedef enum{ /// typedef struct { SMBIOS_STRUCTURE Hdr; - UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE - UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes + UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE + UINT8 InterfaceTypeSpecificDataLength; + UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; /// -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions 2018-08-27 1:06 ` Zeng, Star @ 2018-08-28 1:55 ` Gao, Liming 0 siblings, 0 replies; 7+ messages in thread From: Gao, Liming @ 2018-08-28 1:55 UTC (permalink / raw) To: Zeng, Star, Bi, Dandan, edk2-devel@lists.01.org; +Cc: Kinney, Michael D I have no other comments. Reviewed-by: Liming Gao <liming.gao@intel.com> >-----Original Message----- >From: Zeng, Star >Sent: Monday, August 27, 2018 9:07 AM >To: Bi, Dandan <dandan.bi@intel.com>; edk2-devel@lists.01.org >Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D ><michael.d.kinney@intel.com>; Zeng, Star <star.zeng@intel.com> >Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >Agree and thanks. > >Star >-----Original Message----- >From: Bi, Dandan >Sent: Monday, August 27, 2018 9:00 AM >To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org >Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D ><michael.d.kinney@intel.com> >Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >Hi Star, > >One minor comment: >How about update >+ UINT8 MemoryTechnology; ///< >MEMORY_DEVICE_TECHNOLOGY >To >+ UINT8 MemoryTechnology; ///< The enumeration value >from MEMORY_DEVICE_TECHNOLOGY. >In order to keep consistent with current comments style. > >With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com> > > >Thanks, >Dandan > >-----Original Message----- >From: Zeng, Star >Sent: Thursday, August 23, 2018 11:36 AM >To: edk2-devel@lists.01.org >Cc: Zeng, Star <star.zeng@intel.com>; Gao, Liming <liming.gao@intel.com>; Bi, >Dandan <dandan.bi@intel.com>; Kinney, Michael D ><michael.d.kinney@intel.com> >Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions > >REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 > >Add SMBIOS 3.2.0 definitions according to >www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. > >Processor Information (Type 4): >- SMBIOSCR00163: add socket LGA2066 >- SMBIOSCR00173: add Intel Core i9 >- SMBIOSCR00176: add new processor sockets Port Connector Information >(Type 8): >- SMBIOSCR00168: add USB Type-C >System Slots (Type 9): >- SMBIOSCR00164: add "unavailable" to current usage field >- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): >- SMBIOSCR00162: add support for NVDIMMs >- SMBIOSCR00166: extend support for NVDIMMs and add support for logical >memory type >- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured >Memory Speed" >- SMBIOSCR00174: add new memory technology value (Intel Persistent >Memory, 3D XPoint) IPMI Device Information (Type 38): >- SMBIOSCR00171: add SSIF >Management Controller Host Interface (Type 42) >- SMBIOSCR00175: fix structure data parsing issue > >V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. > >Cc: Liming Gao <liming.gao@intel.com> >Cc: Dandan Bi <dandan.bi@intel.com> >Cc: Michael D Kinney <michael.d.kinney@intel.com> >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Star Zeng <star.zeng@intel.com> >--- > MdePkg/Include/IndustryStandard/SmBios.h | 155 >++++++++++++++++++++++++------- > 1 file changed, 120 insertions(+), 35 deletions(-) > >diff --git a/MdePkg/Include/IndustryStandard/SmBios.h >b/MdePkg/Include/IndustryStandard/SmBios.h >index 5d0442873dfc..61e2f9421f97 100644 >--- a/MdePkg/Include/IndustryStandard/SmBios.h >+++ b/MdePkg/Include/IndustryStandard/SmBios.h >@@ -1,5 +1,5 @@ > /** @file >- Industry Standard Definitions of SMBIOS Table Specification v3.1.1. >+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0. > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> > (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR> >@@ -685,6 +685,7 @@ typedef enum { > ProcessorFamilyzArchitecture = 0xCC, > ProcessorFamilyIntelCoreI5 = 0xCD, > ProcessorFamilyIntelCoreI3 = 0xCE, >+ ProcessorFamilyIntelCoreI9 = 0xCF, > ProcessorFamilyViaC7M = 0xD2, > ProcessorFamilyViaC7D = 0xD3, > ProcessorFamilyViaC7 = 0xD4, >@@ -806,7 +807,11 @@ typedef enum { > ProcessorUpgradeSocketBGA1515 = 0x35, > ProcessorUpgradeSocketLGA3647_1 = 0x36, > ProcessorUpgradeSocketSP3 = 0x37, >- ProcessorUpgradeSocketSP3r2 = 0x38 >+ ProcessorUpgradeSocketSP3r2 = 0x38, >+ ProcessorUpgradeSocketLGA2066 = 0x39, >+ ProcessorUpgradeSocketBGA1392 = 0x3A, >+ ProcessorUpgradeSocketBGA1510 = 0x3B, >+ ProcessorUpgradeSocketBGA1528 = 0x3C > } PROCESSOR_UPGRADE; > > /// >@@ -1159,6 +1164,7 @@ typedef enum { > PortConnectorTypeBNC = 0x20, > PortConnectorType1394 = 0x21, > PortConnectorTypeSasSata = 0x22, >+ PortConnectorTypeUsbTypeC = 0x23, > PortConnectorTypePC98 = 0xA0, > PortConnectorTypePC98Hireso = 0xA1, > PortConnectorTypePCH98 = 0xA2, >@@ -1205,6 +1211,8 @@ typedef enum { > PortTypeNetworkPort = 0x1F, > PortTypeSata = 0x20, > PortTypeSas = 0x21, >+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port >+ PortTypeThunderbolt = 0x23, > PortType8251Compatible = 0xA0, > PortType8251FifoCompatible = 0xA1, > PortTypeOther = 0xFF >@@ -1314,10 +1322,11 @@ typedef enum { > /// System Slots - Current Usage. > /// > typedef enum { >- SlotUsageOther = 0x01, >- SlotUsageUnknown = 0x02, >- SlotUsageAvailable = 0x03, >- SlotUsageInUse = 0x04 >+ SlotUsageOther = 0x01, >+ SlotUsageUnknown = 0x02, >+ SlotUsageAvailable = 0x03, >+ SlotUsageInUse = 0x04, >+ SlotUsageUnavailable = 0x05 > } MISC_SLOT_USAGE; > > /// >@@ -1350,10 +1359,21 @@ typedef struct { > UINT8 PmeSignalSupported :1; > UINT8 HotPlugDevicesSupported :1; > UINT8 SmbusSignalSupported :1; >- UINT8 Reserved :5; ///< Set to 0. >+ UINT8 BifurcationSupported :1; >+ UINT8 Reserved :4; ///< Set to 0. > } MISC_SLOT_CHARACTERISTICS2; > > /// >+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups /// >+typedef struct { >+ UINT16 SegmentGroupNum; >+ UINT8 BusNum; >+ UINT8 DevFuncNum; >+ UINT8 DataBusWidth; >+} MISC_SLOT_PEER_GROUP; >+ >+/// > /// System Slots (Type 9) > /// > /// The information in this structure defines the attributes of a system slot. >@@ -1376,6 +1396,12 @@ typedef struct { > UINT16 SegmentGroupNum; > UINT8 BusNum; > UINT8 DevFuncNum; >+ // >+ // Add for smbios 3.2 >+ // >+ UINT8 DataBusWidth; >+ UINT8 PeerGroupingCount; >+ MISC_SLOT_PEER_GROUP PeerGroups[1]; > } SMBIOS_TABLE_TYPE9; > > /// >@@ -1668,9 +1694,13 @@ typedef enum { > MemoryTypeLpddr = 0x1B, > MemoryTypeLpddr2 = 0x1C, > MemoryTypeLpddr3 = 0x1D, >- MemoryTypeLpddr4 = 0x1E >+ MemoryTypeLpddr4 = 0x1E, >+ MemoryTypeLogicalNonVolatileDevice = 0x1F > } MEMORY_DEVICE_TYPE; > >+/// >+/// Memory Device - Type Detail >+/// > typedef struct { > UINT16 Reserved :1; > UINT16 Other :1; >@@ -1691,6 +1721,41 @@ typedef struct { > } MEMORY_DEVICE_TYPE_DETAIL; > > /// >+/// Memory Device - Memory Technology >+/// >+typedef enum { >+ MemoryTechnologyOther = 0x01, >+ MemoryTechnologyUnknown = 0x02, >+ MemoryTechnologyDram = 0x03, >+ MemoryTechnologyNvdimmN = 0x04, >+ MemoryTechnologyNvdimmF = 0x05, >+ MemoryTechnologyNvdimmP = 0x06, >+ MemoryTechnologyIntelPersistentMemory = 0x07 >+} MEMORY_DEVICE_TECHNOLOGY; >+ >+/// >+/// Memory Device - Memory Operating Mode Capability /// typedef union >+{ >+ /// >+ /// Individual bit fields >+ /// >+ struct { >+ UINT16 Reserved :1; ///< Set to 0. >+ UINT16 Other :1; >+ UINT16 Unknown :1; >+ UINT16 VolatileMemory :1; >+ UINT16 ByteAccessiblePersistentMemory :1; >+ UINT16 BlockAccessiblePersistentMemory :1; >+ UINT16 Reserved2 :10; ///< Set to 0. >+ } Bits; >+ /// >+ /// All bit fields as a 16-bit value >+ /// >+ UINT16 Uint16; >+} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; >+ >+/// > /// Memory Device (Type 17). > /// > /// This structure describes a single memory device that is part of @@ - >1700,38 +1765,57 @@ typedef struct { /// socket is currently populated. > /// > typedef struct { >- SMBIOS_STRUCTURE Hdr; >- UINT16 MemoryArrayHandle; >- UINT16 MemoryErrorInformationHandle; >- UINT16 TotalWidth; >- UINT16 DataWidth; >- UINT16 Size; >- UINT8 FormFactor; ///< The enumeration value from >MEMORY_FORM_FACTOR. >- UINT8 DeviceSet; >- SMBIOS_TABLE_STRING DeviceLocator; >- SMBIOS_TABLE_STRING BankLocator; >- UINT8 MemoryType; ///< The enumeration value from >MEMORY_DEVICE_TYPE. >- MEMORY_DEVICE_TYPE_DETAIL TypeDetail; >- UINT16 Speed; >- SMBIOS_TABLE_STRING Manufacturer; >- SMBIOS_TABLE_STRING SerialNumber; >- SMBIOS_TABLE_STRING AssetTag; >- SMBIOS_TABLE_STRING PartNumber; >+ SMBIOS_STRUCTURE Hdr; >+ UINT16 MemoryArrayHandle; >+ UINT16 MemoryErrorInformationHandle; >+ UINT16 TotalWidth; >+ UINT16 DataWidth; >+ UINT16 Size; >+ UINT8 FormFactor; ///< The enumeration value from >MEMORY_FORM_FACTOR. >+ UINT8 DeviceSet; >+ SMBIOS_TABLE_STRING DeviceLocator; >+ SMBIOS_TABLE_STRING BankLocator; >+ UINT8 MemoryType; ///< The enumeration value >from MEMORY_DEVICE_TYPE. >+ MEMORY_DEVICE_TYPE_DETAIL TypeDetail; >+ UINT16 Speed; >+ SMBIOS_TABLE_STRING Manufacturer; >+ SMBIOS_TABLE_STRING SerialNumber; >+ SMBIOS_TABLE_STRING AssetTag; >+ SMBIOS_TABLE_STRING PartNumber; > // > // Add for smbios 2.6 > // >- UINT8 Attributes; >+ UINT8 Attributes; > // > // Add for smbios 2.7 > // >- UINT32 ExtendedSize; >- UINT16 ConfiguredMemoryClockSpeed; >+ UINT32 ExtendedSize; >+ // >+ // Keep using name "ConfiguredMemoryClockSpeed" for compatibility // >+ although this field is renamed from "Configured Memory Clock Speed" >+ // to "Configured Memory Speed" in smbios 3.2.0. >+ // >+ UINT16 ConfiguredMemoryClockSpeed; > // > // Add for smbios 2.8.0 > // >- UINT16 MinimumVoltage; >- UINT16 MaximumVoltage; >- UINT16 ConfiguredVoltage; >+ UINT16 MinimumVoltage; >+ UINT16 MaximumVoltage; >+ UINT16 ConfiguredVoltage; >+ // >+ // Add for smbios 3.2.0 >+ // >+ UINT8 MemoryTechnology; ///< >MEMORY_DEVICE_TECHNOLOGY >+ MEMORY_DEVICE_OPERATING_MODE_CAPABILITY >MemoryOperatingModeCapability; >+ SMBIOS_TABLE_STRING FirwareVersion; >+ UINT16 ModuleManufacturerID; >+ UINT16 ModuleProductID; >+ UINT16 MemorySubsystemControllerManufacturerID; >+ UINT16 MemorySubsystemControllerProductID; >+ UINT64 NonVolatileSize; >+ UINT64 VolatileSize; >+ UINT64 CacheSize; >+ UINT64 LogicalSize; > } SMBIOS_TABLE_TYPE17; > > /// >@@ -2269,7 +2353,7 @@ typedef enum { > IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller >Style. > IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server >Management Interface Chip. > IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer >- IPMIDeviceInfoInterfaceTypeReserved = 0x04 >+ IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface > } BMC_INTERFACE_TYPE; > > /// >@@ -2339,7 +2423,7 @@ typedef struct { > UINT8 ReferencedOffset; > SMBIOS_TABLE_STRING EntryString; > UINT8 Value[1]; >-}ADDITIONAL_INFORMATION_ENTRY; >+} ADDITIONAL_INFORMATION_ENTRY; > > /// > /// Additional Information (Type 40). >@@ -2425,8 +2509,9 @@ typedef enum{ > /// > typedef struct { > SMBIOS_STRUCTURE Hdr; >- UINT8 InterfaceType; ///< The enumeration value from >MC_HOST_INTERFACE_TYPE >- UINT8 MCHostInterfaceData[1]; ///< This field has a minimum >of four bytes >+ UINT8 InterfaceType; ///< The enumeration value >from MC_HOST_INTERFACE_TYPE >+ UINT8 InterfaceTypeSpecificDataLength; >+ UINT8 InterfaceTypeSpecificData[4]; ///< This field has a >minimum of four bytes > } SMBIOS_TABLE_TYPE42; > > /// >-- >2.7.0.windows.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 2018-08-23 3:36 [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions Star Zeng 2018-08-23 3:36 ` [PATCH V2 1/2] MdePkg SmBios.h: " Star Zeng @ 2018-08-23 3:36 ` Star Zeng 2018-08-27 1:00 ` Bi, Dandan 1 sibling, 1 reply; 7+ messages in thread From: Star Zeng @ 2018-08-23 3:36 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng, Liming Gao, Dandan Bi, Michael D Kinney REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> --- MdeModulePkg/MdeModulePkg.dec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 6a6d9660edc2..261da61c18a2 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1763,11 +1763,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## SMBIOS version. # @Prompt SMBIOS version. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0301|UINT16|0x00010055 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302|UINT16|0x00010055 ## SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. # @Prompt SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x1|UINT8|0x0001006A + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0|UINT8|0x0001006A ## SMBIOS produce method. # BIT0 set indicates 32-bit entry point and table are produced.<BR> -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 2018-08-23 3:36 ` [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 Star Zeng @ 2018-08-27 1:00 ` Bi, Dandan 0 siblings, 0 replies; 7+ messages in thread From: Bi, Dandan @ 2018-08-27 1:00 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org; +Cc: Gao, Liming, Kinney, Michael D Reviewed-by: Dandan Bi <dandan.bi@intel.com> Thanks, Dandan -----Original Message----- From: Zeng, Star Sent: Thursday, August 23, 2018 11:36 AM To: edk2-devel@lists.01.org Cc: Zeng, Star <star.zeng@intel.com>; Gao, Liming <liming.gao@intel.com>; Bi, Dandan <dandan.bi@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com> Subject: [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> --- MdeModulePkg/MdeModulePkg.dec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 6a6d9660edc2..261da61c18a2 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1763,11 +1763,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## SMBIOS version. # @Prompt SMBIOS version. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0301|UINT16|0x00010055 + + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302|UINT16|0x000100 + 55 ## SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. # @Prompt SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x1|UINT8|0x0001006A + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0|UINT8|0x0001006A ## SMBIOS produce method. # BIT0 set indicates 32-bit entry point and table are produced.<BR> -- 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-08-28 1:56 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-08-23 3:36 [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions Star Zeng 2018-08-23 3:36 ` [PATCH V2 1/2] MdePkg SmBios.h: " Star Zeng 2018-08-27 1:00 ` Bi, Dandan 2018-08-27 1:06 ` Zeng, Star 2018-08-28 1:55 ` Gao, Liming 2018-08-23 3:36 ` [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0 Star Zeng 2018-08-27 1:00 ` Bi, Dandan
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