From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BDF402115C30B for ; Fri, 28 Sep 2018 19:34:33 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Sep 2018 19:34:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,317,1534834800"; d="scan'208";a="94479446" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga001.fm.intel.com with ESMTP; 28 Sep 2018 19:33:44 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 28 Sep 2018 19:33:44 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.183]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.27]) with mapi id 14.03.0319.002; Sat, 29 Sep 2018 10:33:42 +0800 From: "Gao, Liming" To: "Wu, Hao A" , "edk2-devel@lists.01.org" CC: Ard Biesheuvel , Leif Lindholm , Laszlo Ersek , "Yao, Jiewen" , "Kinney, Michael D" Thread-Topic: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API Thread-Index: AQHUVJbWMjpg0z8ikEWTQl3qA1cyUaUGkHUQ Date: Sat, 29 Sep 2018 02:33:42 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E31D629@SHSMSX104.ccr.corp.intel.com> References: <20180925061259.31680-1-hao.a.wu@intel.com> <20180925061259.31680-2-hao.a.wu@intel.com> In-Reply-To: <20180925061259.31680-2-hao.a.wu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjI5MDRjNjEtOTgzZS00OWZhLWFmOTAtNWMyYzdkM2RjZTJlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUHRxMkNCdEdrQTEwZjFSUFFTUEpsdXZYa3EyWlh4Q0ttdkRCNUlVSXJmM2lqQ1Q0T3JmWUFIY0FvXC8wTE4wYzQifQ== dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 29 Sep 2018 02:34:34 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao > -----Original Message----- > From: Wu, Hao A > Sent: Tuesday, September 25, 2018 2:13 PM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Ard Biesheuvel ; Leif Lindholm ; Laszlo > Ersek ; Yao, Jiewen ; Kinney, Mi= chael D ; Gao, Liming > > Subject: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D1193 >=20 > This commit will add a new BaseLib API AsmLfence(). This API will perform > a serializing operation on all load-from-memory instructions that were > issued prior to the call of this function. Please note that this API is > only available on IA-32 and x64. >=20 > The purpose of adding this API is to mitigate of the [CVE-2017-5753] > Bounds Check Bypass issue when untrusted data are being processed within > SMM. More details can be referred at the 'Bounds check bypass mitigation' > section at the below link: >=20 > https://software.intel.com/security-software-guidance/insights/host-firmw= are-speculative-execution-side-channel-mitigation >=20 > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Cc: Laszlo Ersek > Cc: Jiewen Yao > Cc: Michael D Kinney > Cc: Liming Gao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Hao Wu > --- > MdePkg/Include/Library/BaseLib.h | 13 +++++++ > MdePkg/Library/BaseLib/BaseLib.inf | 2 ++ > MdePkg/Library/BaseLib/Ia32/Lfence.nasm | 37 +++++++++++++++++++ > MdePkg/Library/BaseLib/X64/Lfence.nasm | 38 ++++++++++++++++++++ > 4 files changed, 90 insertions(+) >=20 > diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/Ba= seLib.h > index 123ae19dc2..656b7736b1 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -9139,6 +9139,19 @@ AsmWriteTr ( > ); >=20 > /** > + Performs a serializing operation on all load-from-memory instructions = that > + were issued prior the AsmLfence function. > + > + Executes a LFENCE instruction. This function is only available on IA-3= 2 and x64. > + > +**/ > +VOID > +EFIAPI > +AsmLfence ( > + VOID > + ); > + > +/** > Patch the immediate operand of an IA32 or X64 instruction such that th= e byte, > word, dword or qword operand is encoded at the end of the instruction'= s > binary representation. > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/= BaseLib.inf > index a1b5ec4b75..ed15c025f9 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -68,6 +68,7 @@ >=20 > [Sources.Ia32] > Ia32/WriteTr.nasm > + Ia32/Lfence.nasm >=20 > Ia32/Wbinvd.c | MSFT > Ia32/WriteMm7.c | MSFT > @@ -346,6 +347,7 @@ > X64/EnableCache.nasm > X64/DisableCache.nasm > X64/WriteTr.nasm > + X64/Lfence.nasm >=20 > X64/CpuBreakpoint.c | MSFT > X64/WriteMsr64.c | MSFT > diff --git a/MdePkg/Library/BaseLib/Ia32/Lfence.nasm b/MdePkg/Library/Bas= eLib/Ia32/Lfence.nasm > new file mode 100644 > index 0000000000..f8b2550ef8 > --- /dev/null > +++ b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm > @@ -0,0 +1,37 @@ > +;-----------------------------------------------------------------------= ------- ; > +; Copyright (c) 2018, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials > +; are licensed and made available under the terms and conditions of the = BSD License > +; which accompanies this distribution. The full text of the license may= be found at > +; http://opensource.org/licenses/bsd-license.php. > +; > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. > +; > +; Module Name: > +; > +; Lfence.nasm > +; > +; Abstract: > +; > +; Performs a serializing operation on all load-from-memory instruction= s that > +; were issued prior to the call of this function. > +; > +; Notes: > +; > +;-----------------------------------------------------------------------= ------- > + > + SECTION .text > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; AsmLfence ( > +; VOID > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(AsmLfence) > +ASM_PFX(AsmLfence): > + lfence > + ret > + > diff --git a/MdePkg/Library/BaseLib/X64/Lfence.nasm b/MdePkg/Library/Base= Lib/X64/Lfence.nasm > new file mode 100644 > index 0000000000..e81c77964b > --- /dev/null > +++ b/MdePkg/Library/BaseLib/X64/Lfence.nasm > @@ -0,0 +1,38 @@ > +;-----------------------------------------------------------------------= ------- ; > +; Copyright (c) 2018, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials > +; are licensed and made available under the terms and conditions of the = BSD License > +; which accompanies this distribution. The full text of the license may= be found at > +; http://opensource.org/licenses/bsd-license.php. > +; > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. > +; > +; Module Name: > +; > +; Lfence.nasm > +; > +; Abstract: > +; > +; Performs a serializing operation on all load-from-memory instruction= s that > +; were issued prior to the call of this function. > +; > +; Notes: > +; > +;-----------------------------------------------------------------------= ------- > + > + DEFAULT REL > + SECTION .text > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; AsmLfence ( > +; VOID > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(AsmLfence) > +ASM_PFX(AsmLfence): > + lfence > + ret > + > -- > 2.12.0.windows.1