* [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
@ 2019-01-31 8:01 Digant H Solanki
2019-01-31 8:03 ` Ni, Ray
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Digant H Solanki @ 2019-01-31 8:01 UTC (permalink / raw)
To: edk2-devel; +Cc: Ray Ni, Liming Gao, Rangasai V Chaganty
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1454
Based on latest IGD OpRegion Spec, IGD_OPREGION_MBOX3 needs to be updated with two new members : Physical Address of Raw VBT Data (RVDA) and Size of Raw VBT Data (RVDS)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Digant H Solanki <digant.h.solanki@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
index 5ce80a5be8..300a85a717 100644
--- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -4,9 +4,7 @@
https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
- @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
-
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -118,7 +116,9 @@ typedef struct {
UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature
UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
UINT32 STAT; ///< Offset 0x3B6 State Indicator
- UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero. Bug in spec 0x45(69)
+ UINT64 RVDA; ///< Offset 0x3BA Physical address of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.
+ UINT32 RVDS; ///< Offset 0x3C2 Size of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.
+ UINT8 RM32[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
} IGD_OPREGION_MBOX3;
///
--
2.18.0.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
2019-01-31 8:01 [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure Digant H Solanki
@ 2019-01-31 8:03 ` Ni, Ray
2019-01-31 8:06 ` Gao, Liming
2019-01-31 8:22 ` Chaganty, Rangasai V
2 siblings, 0 replies; 4+ messages in thread
From: Ni, Ray @ 2019-01-31 8:03 UTC (permalink / raw)
To: Solanki, Digant H, edk2-devel@lists.01.org
Cc: Gao, Liming, Chaganty, Rangasai V
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: Solanki, Digant H <digant.h.solanki@intel.com>
> Sent: Thursday, January 31, 2019 4:01 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ray <ray.ni@intel.com>; Gao, Liming <liming.gao@intel.com>;
> Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update
> IGD_OPREGION_MBOX3 Structure
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1454
> Based on latest IGD OpRegion Spec, IGD_OPREGION_MBOX3 needs to be
> updated with two new members : Physical Address of Raw VBT Data (RVDA)
> and Size of Raw VBT Data (RVDS)
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Digant H Solanki <digant.h.solanki@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> ---
> IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> index 5ce80a5be8..300a85a717 100644
> --- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> +++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> @@ -4,9 +4,7 @@
>
> https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
>
> - @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
> -
> - Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016 - 2019, Intel Corporation. All rights
> + reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be
> found at @@ -118,7 +116,9 @@ typedef struct {
> UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS
> feature
> UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
> UINT32 STAT; ///< Offset 0x3B6 State Indicator
> - UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero.
> Bug in spec 0x45(69)
> + UINT64 RVDA; ///< Offset 0x3BA Physical address of Raw VBT data.
> Added from Spec Version 0.90 to support VBT greater than 6KB.
> + UINT32 RVDS; ///< Offset 0x3C2 Size of Raw VBT data. Added from
> Spec Version 0.90 to support VBT greater than 6KB.
> + UINT8 RM32[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
> } IGD_OPREGION_MBOX3;
>
> ///
> --
> 2.18.0.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
2019-01-31 8:01 [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure Digant H Solanki
2019-01-31 8:03 ` Ni, Ray
@ 2019-01-31 8:06 ` Gao, Liming
2019-01-31 8:22 ` Chaganty, Rangasai V
2 siblings, 0 replies; 4+ messages in thread
From: Gao, Liming @ 2019-01-31 8:06 UTC (permalink / raw)
To: Solanki, Digant H, edk2-devel@lists.01.org
One comment on the title. This is Patch V5, not Patch 5/5. You don't need to send new patch.
Thanks
Liming
> -----Original Message-----
> From: Solanki, Digant H
> Sent: Thursday, January 31, 2019 4:01 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ray <ray.ni@intel.com>; Gao, Liming <liming.gao@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1454
> Based on latest IGD OpRegion Spec, IGD_OPREGION_MBOX3 needs to be updated with two new members : Physical Address of Raw VBT
> Data (RVDA) and Size of Raw VBT Data (RVDS)
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Digant H Solanki <digant.h.solanki@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> ---
> IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> index 5ce80a5be8..300a85a717 100644
> --- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> +++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
> @@ -4,9 +4,7 @@
>
> https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
>
> - @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
> -
> - Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD License
> which accompanies this distribution. The full text of the license may be found at
> @@ -118,7 +116,9 @@ typedef struct {
> UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature
> UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
> UINT32 STAT; ///< Offset 0x3B6 State Indicator
> - UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero. Bug in spec 0x45(69)
> + UINT64 RVDA; ///< Offset 0x3BA Physical address of Raw VBT data. Added from Spec Version 0.90 to support VBT greater
> than 6KB.
> + UINT32 RVDS; ///< Offset 0x3C2 Size of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.
> + UINT8 RM32[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
> } IGD_OPREGION_MBOX3;
>
> ///
> --
> 2.18.0.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
2019-01-31 8:01 [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure Digant H Solanki
2019-01-31 8:03 ` Ni, Ray
2019-01-31 8:06 ` Gao, Liming
@ 2019-01-31 8:22 ` Chaganty, Rangasai V
2 siblings, 0 replies; 4+ messages in thread
From: Chaganty, Rangasai V @ 2019-01-31 8:22 UTC (permalink / raw)
To: Solanki, Digant H, edk2-devel@lists.01.org; +Cc: Ni, Ray, Gao, Liming
Reviewed-by: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
-----Original Message-----
From: Solanki, Digant H
Sent: Thursday, January 31, 2019 12:01 AM
To: edk2-devel@lists.01.org
Cc: Ni, Ray <ray.ni@intel.com>; Gao, Liming <liming.gao@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1454
Based on latest IGD OpRegion Spec, IGD_OPREGION_MBOX3 needs to be updated with two new members : Physical Address of Raw VBT Data (RVDA) and Size of Raw VBT Data (RVDS)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Digant H Solanki <digant.h.solanki@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
index 5ce80a5be8..300a85a717 100644
--- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -4,9 +4,7 @@
https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
- @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
-
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2019, Intel Corporation. All rights
+ reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -118,7 +116,9 @@ typedef struct {
UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature
UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
UINT32 STAT; ///< Offset 0x3B6 State Indicator
- UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero. Bug in spec 0x45(69)
+ UINT64 RVDA; ///< Offset 0x3BA Physical address of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.
+ UINT32 RVDS; ///< Offset 0x3C2 Size of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.
+ UINT8 RM32[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
} IGD_OPREGION_MBOX3;
///
--
2.18.0.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
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2019-01-31 8:01 [PATCH 5/5] IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 Structure Digant H Solanki
2019-01-31 8:03 ` Ni, Ray
2019-01-31 8:06 ` Gao, Liming
2019-01-31 8:22 ` Chaganty, Rangasai V
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