From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BD172201B042A for ; Thu, 21 Feb 2019 23:06:26 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Feb 2019 23:06:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,398,1544515200"; d="scan'208";a="118204007" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga006.jf.intel.com with ESMTP; 21 Feb 2019 23:06:26 -0800 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 21 Feb 2019 23:06:25 -0800 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 21 Feb 2019 23:06:25 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.102]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.232]) with mapi id 14.03.0415.000; Fri, 22 Feb 2019 15:06:22 +0800 From: "Gao, Liming" To: "Yao, Jiewen" , "edk2-devel@lists.01.org" CC: "Dong, Eric" , "Yao, Jiewen" , "Kinney, Michael D" , Laszlo Ersek Thread-Topic: [edk2] [PATCH 0/3] Add SMM CET support Thread-Index: AQHUymVf7V/Ldhl5W0+iuoVgrd8ApqXrZWeA Date: Fri, 22 Feb 2019 07:06:22 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E3E5DE7@SHSMSX104.ccr.corp.intel.com> References: <20190222041558.25312-1-jiewen.yao@intel.com> In-Reply-To: <20190222041558.25312-1-jiewen.yao@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 0/3] Add SMM CET support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Feb 2019 07:06:27 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Acked-by: Liming Gao >-----Original Message----- >From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of >Jiewen Yao >Sent: Friday, February 22, 2019 12:16 PM >To: edk2-devel@lists.01.org >Cc: Dong, Eric ; Gao, Liming ; >Yao, Jiewen ; Kinney, Michael D >; Laszlo Ersek >Subject: [edk2] [PATCH 0/3] Add SMM CET support > >REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1521 > >This patch series implement add CET ShadowStack support for SMM. > >The CET document can be found at: >https://software.intel.com/sites/default/files/managed/4d/2a/control-flow- >enforcement-technology-preview.pdf > >Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER. >Patch 2 adds Control Protection exception (CP#) dump info. >Patch 3 adds CET ShadowStack support in SMM. > >For more detail please refer to each patch. > >I also post all update to https://github.com/jyao1/edk2/tree/CET > >Cc: Michael D Kinney >Cc: Liming Gao >Cc: Eric Dong >Cc: Ray Ni >Cc: Laszlo Ersek >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Yao Jiewen > >Jiewen Yao (3): > MdePkg/BaseLib: Add Shadow Stack Support for X86. > UefiCpuPkg/ExceptionLib: Add CET support. > UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM. > > MdePkg/Include/Library/BaseLib.h | 2 + > MdePkg/Library/BaseLib/Ia32/LongJump.nasm | 18 ++- > MdePkg/Library/BaseLib/Ia32/SetJump.nasm | 17 ++- > MdePkg/Library/BaseLib/X64/LongJump.nasm | 20 ++- > MdePkg/Library/BaseLib/X64/SetJump.nasm | 17 ++- > .../Include/Library/SmmCpuFeaturesLib.h | 23 +++- > .../CpuExceptionCommon.c | 7 +- > .../CpuExceptionCommon.h | 3 +- > .../Ia32/ArchExceptionHandler.c | 5 +- > .../X64/ArchExceptionHandler.c | 5 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 37 ++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 38 +++++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 98 >++++++++++++++- > .../PiSmmCpuDxeSmm/Ia32/SmiException.nasm | 6 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 57 ++++++++- > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 12 +- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 97 >++++++++++++-- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 103 >++++++++++++++- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 6 +- > .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 85 >++++++++++++- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 18 ++- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h | 4 +- > UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 4 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 38 ++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 39 +++++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 119 >+++++++++++++++++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 58 ++++++++- > UefiCpuPkg/UefiCpuPkg.dec | 13 +- > 28 files changed, 890 insertions(+), 59 deletions(-) > create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm > create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm > >-- >2.19.2.windows.1 > >_______________________________________________ >edk2-devel mailing list >edk2-devel@lists.01.org >https://lists.01.org/mailman/listinfo/edk2-devel