From: "Gao, Liming" <liming.gao@intel.com>
To: "Gao, Zhichao" <zhichao.gao@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Wang, Jian J" <jian.j.wang@intel.com>,
"Wu, Hao A" <hao.a.wu@intel.com>, "Ni, Ray" <ray.ni@intel.com>,
"Zeng, Star" <star.zeng@intel.com>,
"Ard Biesheuvel" <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function
Date: Mon, 25 Mar 2019 06:59:22 +0000 [thread overview]
Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E40AF95@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <20190322030718.17676-2-zhichao.gao@intel.com>
Zhichao:
Could you help clarify the commit message? Does IA32 and X64 Arch implementation need flush function or not?
>The IA32 ARCH need cache flush function during capsule update.
>Both arm ARCH and IA32 do not need flush cache function,
Thanks
Liming
>-----Original Message-----
>From: Gao, Zhichao
>Sent: Friday, March 22, 2019 11:07 AM
>To: edk2-devel@lists.01.org
>Cc: Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>;
>Ni, Ray <ray.ni@intel.com>; Zeng, Star <star.zeng@intel.com>; Gao, Liming
><liming.gao@intel.com>; Ard Biesheuvel <ard.biesheuvel@linaro.org>
>Subject: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache
>flush function
>
>BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1462
>
>The IA32 ARCH need cache flush function during capsule update.
>Both arm ARCH and IA32 do not need flush cache function, so
>merge the CapsuleCacheWriteBack() to one file. And add a null
>version for EBC.
>
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
>Cc: Jian J Wang <jian.j.wang@intel.com>
>Cc: Hao Wu <hao.a.wu@intel.com>
>Cc: Ray Ni <ray.ni@intel.com>
>Cc: Star Zeng <star.zeng@intel.com>
>Cc: Liming Gao <liming.gao@intel.com>
>Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>---
> .../Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c | 35 +-----------
> .../Universal/CapsuleRuntimeDxe/CapsuleCache.c | 63
>++++++++++++++++++++++
> .../Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c | 38 +++++++++++++
> .../Universal/CapsuleRuntimeDxe/CapsuleReset.c | 16 +-----
> .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf | 20 ++++---
> 5 files changed, 115 insertions(+), 57 deletions(-)
> create mode 100644
>MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c
> create mode 100644
>MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c
>
>diff --git
>a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c
>index d79d2fc693..ec630ab7a8 100644
>--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c
>+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c
>@@ -3,6 +3,7 @@
> PersistAcrossReset capsules
>
> Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
>
> This program and the accompanying materials are licensed and made
>available
> under the terms and conditions of the BSD License which accompanies this
>@@ -16,8 +17,6 @@
>
> #include "CapsuleService.h"
>
>-#include <Library/CacheMaintenanceLib.h>
>-
> /**
> Whether the platform supports capsules that persist across reset. Note that
> some platforms only support such capsules at boot time.
>@@ -41,35 +40,3 @@ IsPersistAcrossResetCapsuleSupported (
> return FeaturePcdGet (PcdSupportUpdateCapsuleReset) && !EfiAtRuntime
>();
> }
>
>-/**
>- Writes Back a range of data cache lines covering a set of capsules in memory.
>-
>- Writes Back the data cache lines specified by ScatterGatherList.
>-
>- @param ScatterGatherList Physical address of the data structure that
>- describes a set of capsules in memory
>-
>-**/
>-VOID
>-CapsuleCacheWriteBack (
>- IN EFI_PHYSICAL_ADDRESS ScatterGatherList
>- )
>-{
>- EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc;
>-
>- Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList;
>- do {
>- WriteBackDataCacheRange (Desc, sizeof *Desc);
>-
>- if (Desc->Length > 0) {
>- WriteBackDataCacheRange ((VOID *)(UINTN)Desc->Union.DataBlock,
>- Desc->Length
>- );
>- Desc++;
>- } else if (Desc->Union.ContinuationPointer > 0) {
>- Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc-
>>Union.ContinuationPointer;
>- }
>- } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0);
>-
>- WriteBackDataCacheRange (Desc, sizeof *Desc);
>-}
>diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c
>new file mode 100644
>index 0000000000..ab81296a65
>--- /dev/null
>+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c
>@@ -0,0 +1,63 @@
>+/** @file
>+ Flush the cache is required for most architectures while do capsule
>+ update. It is not support at Runtime.
>+
>+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
>+
>+ This program and the accompanying materials are licensed and made
>available
>+ under the terms and conditions of the BSD License which accompanies this
>+ distribution. The full text of the license may be found at
>+ http://opensource.org/licenses/bsd-license.php
>+
>+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>BASIS,
>+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>+
>+**/
>+
>+#include "CapsuleService.h"
>+
>+#include <Library/CacheMaintenanceLib.h>
>+
>+/**
>+ Writes Back a range of data cache lines covering a set of capsules in memory.
>+
>+ Writes Back the data cache lines specified by ScatterGatherList.
>+
>+ @param ScatterGatherList Physical address of the data structure that
>+ describes a set of capsules in memory
>+
>+**/
>+VOID
>+CapsuleCacheWriteBack (
>+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList
>+ )
>+{
>+ EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc;
>+
>+ if (!EfiAtRuntime ()) {
>+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList;
>+ do {
>+ WriteBackDataCacheRange (
>+ (VOID *)(UINTN)Desc,
>+ (UINTN)sizeof (*Desc)
>+ );
>+
>+ if (Desc->Length > 0) {
>+ WriteBackDataCacheRange (
>+ (VOID *)(UINTN)Desc->Union.DataBlock,
>+ (UINTN)Desc->Length
>+ );
>+ Desc++;
>+ } else if (Desc->Union.ContinuationPointer > 0) {
>+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc-
>>Union.ContinuationPointer;
>+ }
>+ } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0);
>+
>+ WriteBackDataCacheRange (
>+ (VOID *)(UINTN)Desc,
>+ (UINTN)sizeof (*Desc)
>+ );
>+ }
>+}
>+
>diff --git
>a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c
>new file mode 100644
>index 0000000000..cfb9bb1bf1
>--- /dev/null
>+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c
>@@ -0,0 +1,38 @@
>+/** @file
>+ Null function version of cache function.
>+
>+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
>+
>+ This program and the accompanying materials are licensed and made
>available
>+ under the terms and conditions of the BSD License which accompanies this
>+ distribution. The full text of the license may be found at
>+ http://opensource.org/licenses/bsd-license.php
>+
>+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>BASIS,
>+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>+
>+**/
>+
>+#include "CapsuleService.h"
>+
>+#include <Library/CacheMaintenanceLib.h>
>+
>+/**
>+ Writes Back a range of data cache lines covering a set of capsules in memory.
>+
>+ Writes Back the data cache lines specified by ScatterGatherList.
>+
>+ Null version, do nothing.
>+
>+ @param ScatterGatherList Physical address of the data structure that
>+ describes a set of capsules in memory
>+
>+**/
>+VOID
>+CapsuleCacheWriteBack (
>+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList
>+ )
>+{
>+}
>+
>diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c
>index 353f6f2090..8990cf2a35 100644
>--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c
>+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c
>@@ -3,6 +3,7 @@
> PersistAcrossReset capsules
>
> Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
>
> This program and the accompanying materials are licensed and made
>available
> under the terms and conditions of the BSD License which accompanies this
>@@ -32,18 +33,3 @@ IsPersistAcrossResetCapsuleSupported (
> return FeaturePcdGet (PcdSupportUpdateCapsuleReset);
> }
>
>-/**
>- Writes Back a range of data cache lines covering a set of capsules in memory.
>-
>- Writes Back the data cache lines specified by ScatterGatherList.
>-
>- @param ScatterGatherList Physical address of the data structure that
>- describes a set of capsules in memory
>-
>-**/
>-VOID
>-CapsuleCacheWriteBack (
>- IN EFI_PHYSICAL_ADDRESS ScatterGatherList
>- )
>-{
>-}
>diff --git
>a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>index ad7af5fe62..a0cb32a06f 100644
>--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>+++
>b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>@@ -4,7 +4,7 @@
> # It installs the Capsule Architectural Protocol defined in PI1.0a to signify
> # the capsule runtime services are ready.
> #
>-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
>+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD
>License
> # which accompanies this distribution. The full text of the license may be
>found at
>@@ -36,16 +36,22 @@
>
> [Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64]
> SaveLongModeContext.c
>- CapsuleReset.c
>
>-[Sources.X64]
>- X64/SaveLongModeContext.c
>+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64]
>+ CapsuleCache.c
>+
>+[Sources.Ia32, Sources.X64, Sources.EBC]
> CapsuleReset.c
>
> [Sources.ARM, Sources.AARCH64]
>- SaveLongModeContext.c
> Arm/CapsuleReset.c
>
>+[Sources.EBC]
>+ CapsuleCacheNull.c
>+
>+[Sources.X64]
>+ X64/SaveLongModeContext.c
>+
> [Packages]
> MdePkg/MdePkg.dec
> MdeModulePkg/MdeModulePkg.dec
>@@ -61,14 +67,12 @@
> BaseLib
> PrintLib
> BaseMemoryLib
>+ CacheMaintenanceLib
>
> [LibraryClasses.X64]
> UefiLib
> BaseMemoryLib
>
>-[LibraryClasses.ARM, LibraryClasses.AARCH64]
>- CacheMaintenanceLib
>-
> [Guids]
> ## SOMETIMES_PRODUCES ## Variable:L"CapsuleUpdateData" # (Process
>across reset capsule image) for capsule updated data
> ## SOMETIMES_PRODUCES ## Variable:L"CapsuleLongModeBuffer" # The
>long mode buffer used by IA32 Capsule PEIM to call X64 CapsuleCoalesce code
>to handle >4GB capsule blocks
>--
>2.16.2.windows.1
next prev parent reply other threads:[~2019-03-25 6:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 3:07 [PATCH V2 0/2] Change reset logic related on capsule Zhichao Gao
2019-03-22 3:07 ` [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function Zhichao Gao
2019-03-25 6:59 ` Gao, Liming [this message]
2019-03-25 7:09 ` Gao, Zhichao
2019-03-25 8:25 ` Ard Biesheuvel
2019-03-25 11:06 ` Gao, Zhichao
2019-03-22 3:07 ` [PATCH V2 2/2] MdeModulePkg/ResetSystemRuntimeDxe: Remove DoS3 in warm reset Zhichao Gao
2019-03-29 12:01 ` [PATCH V2 0/2] Change reset logic related on capsule Gao, Liming
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