From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=liming.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4DDDA21A00AE6 for ; Sun, 24 Mar 2019 23:59:27 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Mar 2019 23:59:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,256,1549958400"; d="scan'208";a="155494116" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga004.fm.intel.com with ESMTP; 24 Mar 2019 23:59:26 -0700 Received: from shsmsx107.ccr.corp.intel.com (10.239.4.96) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 24 Mar 2019 23:59:25 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.74]) by SHSMSX107.ccr.corp.intel.com ([169.254.9.252]) with mapi id 14.03.0415.000; Mon, 25 Mar 2019 14:59:23 +0800 From: "Gao, Liming" To: "Gao, Zhichao" , "edk2-devel@lists.01.org" CC: "Wang, Jian J" , "Wu, Hao A" , "Ni, Ray" , "Zeng, Star" , "Ard Biesheuvel" Thread-Topic: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function Thread-Index: AQHU4Fyu1oOYa29PMEeFfYYEc7stQ6Yb74iw Date: Mon, 25 Mar 2019 06:59:22 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E40AF95@SHSMSX104.ccr.corp.intel.com> References: <20190322030718.17676-1-zhichao.gao@intel.com> <20190322030718.17676-2-zhichao.gao@intel.com> In-Reply-To: <20190322030718.17676-2-zhichao.gao@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Mar 2019 06:59:27 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Zhichao: Could you help clarify the commit message? Does IA32 and X64 Arch impleme= ntation need flush function or not?=20 >The IA32 ARCH need cache flush function during capsule update. >Both arm ARCH and IA32 do not need flush cache function, Thanks Liming >-----Original Message----- >From: Gao, Zhichao >Sent: Friday, March 22, 2019 11:07 AM >To: edk2-devel@lists.01.org >Cc: Wang, Jian J ; Wu, Hao A ; >Ni, Ray ; Zeng, Star ; Gao, Liming >; Ard Biesheuvel >Subject: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache >flush function > >BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1462 > >The IA32 ARCH need cache flush function during capsule update. >Both arm ARCH and IA32 do not need flush cache function, so >merge the CapsuleCacheWriteBack() to one file. And add a null >version for EBC. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Zhichao Gao >Cc: Jian J Wang >Cc: Hao Wu >Cc: Ray Ni >Cc: Star Zeng >Cc: Liming Gao >Cc: Ard Biesheuvel >--- > .../Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c | 35 +----------- > .../Universal/CapsuleRuntimeDxe/CapsuleCache.c | 63 >++++++++++++++++++++++ > .../Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c | 38 +++++++++++++ > .../Universal/CapsuleRuntimeDxe/CapsuleReset.c | 16 +----- > .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf | 20 ++++--- > 5 files changed, 115 insertions(+), 57 deletions(-) > create mode 100644 >MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c > create mode 100644 >MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c > >diff --git >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c >index d79d2fc693..ec630ab7a8 100644 >--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c >@@ -3,6 +3,7 @@ > PersistAcrossReset capsules > > Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.
> > This program and the accompanying materials are licensed and made >available > under the terms and conditions of the BSD License which accompanies thi= s >@@ -16,8 +17,6 @@ > > #include "CapsuleService.h" > >-#include >- > /** > Whether the platform supports capsules that persist across reset. Note = that > some platforms only support such capsules at boot time. >@@ -41,35 +40,3 @@ IsPersistAcrossResetCapsuleSupported ( > return FeaturePcdGet (PcdSupportUpdateCapsuleReset) && !EfiAtRuntime >(); > } > >-/** >- Writes Back a range of data cache lines covering a set of capsules in m= emory. >- >- Writes Back the data cache lines specified by ScatterGatherList. >- >- @param ScatterGatherList Physical address of the data structure that >- describes a set of capsules in memory >- >-**/ >-VOID >-CapsuleCacheWriteBack ( >- IN EFI_PHYSICAL_ADDRESS ScatterGatherList >- ) >-{ >- EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc; >- >- Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList; >- do { >- WriteBackDataCacheRange (Desc, sizeof *Desc); >- >- if (Desc->Length > 0) { >- WriteBackDataCacheRange ((VOID *)(UINTN)Desc->Union.DataBlock, >- Desc->Length >- ); >- Desc++; >- } else if (Desc->Union.ContinuationPointer > 0) { >- Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc- >>Union.ContinuationPointer; >- } >- } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0); >- >- WriteBackDataCacheRange (Desc, sizeof *Desc); >-} >diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c >new file mode 100644 >index 0000000000..ab81296a65 >--- /dev/null >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c >@@ -0,0 +1,63 @@ >+/** @file >+ Flush the cache is required for most architectures while do capsule >+ update. It is not support at Runtime. >+ >+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.
>+ >+ This program and the accompanying materials are licensed and made >available >+ under the terms and conditions of the BSD License which accompanies thi= s >+ distribution. The full text of the license may be found at >+ http://opensource.org/licenses/bsd-license.php >+ >+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" >BASIS, >+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER >EXPRESS OR IMPLIED. >+ >+**/ >+ >+#include "CapsuleService.h" >+ >+#include >+ >+/** >+ Writes Back a range of data cache lines covering a set of capsules in m= emory. >+ >+ Writes Back the data cache lines specified by ScatterGatherList. >+ >+ @param ScatterGatherList Physical address of the data structure that >+ describes a set of capsules in memory >+ >+**/ >+VOID >+CapsuleCacheWriteBack ( >+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList >+ ) >+{ >+ EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc; >+ >+ if (!EfiAtRuntime ()) { >+ Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList; >+ do { >+ WriteBackDataCacheRange ( >+ (VOID *)(UINTN)Desc, >+ (UINTN)sizeof (*Desc) >+ ); >+ >+ if (Desc->Length > 0) { >+ WriteBackDataCacheRange ( >+ (VOID *)(UINTN)Desc->Union.DataBlock, >+ (UINTN)Desc->Length >+ ); >+ Desc++; >+ } else if (Desc->Union.ContinuationPointer > 0) { >+ Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc- >>Union.ContinuationPointer; >+ } >+ } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0); >+ >+ WriteBackDataCacheRange ( >+ (VOID *)(UINTN)Desc, >+ (UINTN)sizeof (*Desc) >+ ); >+ } >+} >+ >diff --git >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c >new file mode 100644 >index 0000000000..cfb9bb1bf1 >--- /dev/null >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c >@@ -0,0 +1,38 @@ >+/** @file >+ Null function version of cache function. >+ >+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.
>+ >+ This program and the accompanying materials are licensed and made >available >+ under the terms and conditions of the BSD License which accompanies thi= s >+ distribution. The full text of the license may be found at >+ http://opensource.org/licenses/bsd-license.php >+ >+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" >BASIS, >+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER >EXPRESS OR IMPLIED. >+ >+**/ >+ >+#include "CapsuleService.h" >+ >+#include >+ >+/** >+ Writes Back a range of data cache lines covering a set of capsules in m= emory. >+ >+ Writes Back the data cache lines specified by ScatterGatherList. >+ >+ Null version, do nothing. >+ >+ @param ScatterGatherList Physical address of the data structure that >+ describes a set of capsules in memory >+ >+**/ >+VOID >+CapsuleCacheWriteBack ( >+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList >+ ) >+{ >+} >+ >diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c >index 353f6f2090..8990cf2a35 100644 >--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c >@@ -3,6 +3,7 @@ > PersistAcrossReset capsules > > Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>+ Copyright (c) 2019, Intel Corporation. All rights reserved.
> > This program and the accompanying materials are licensed and made >available > under the terms and conditions of the BSD License which accompanies thi= s >@@ -32,18 +33,3 @@ IsPersistAcrossResetCapsuleSupported ( > return FeaturePcdGet (PcdSupportUpdateCapsuleReset); > } > >-/** >- Writes Back a range of data cache lines covering a set of capsules in m= emory. >- >- Writes Back the data cache lines specified by ScatterGatherList. >- >- @param ScatterGatherList Physical address of the data structure that >- describes a set of capsules in memory >- >-**/ >-VOID >-CapsuleCacheWriteBack ( >- IN EFI_PHYSICAL_ADDRESS ScatterGatherList >- ) >-{ >-} >diff --git >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf >index ad7af5fe62..a0cb32a06f 100644 >--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf >+++ >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf >@@ -4,7 +4,7 @@ > # It installs the Capsule Architectural Protocol defined in PI1.0a to si= gnify > # the capsule runtime services are ready. > # >-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
>+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
> # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the = BSD >License > # which accompanies this distribution. The full text of the license may= be >found at >@@ -36,16 +36,22 @@ > > [Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64] > SaveLongModeContext.c >- CapsuleReset.c > >-[Sources.X64] >- X64/SaveLongModeContext.c >+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64] >+ CapsuleCache.c >+ >+[Sources.Ia32, Sources.X64, Sources.EBC] > CapsuleReset.c > > [Sources.ARM, Sources.AARCH64] >- SaveLongModeContext.c > Arm/CapsuleReset.c > >+[Sources.EBC] >+ CapsuleCacheNull.c >+ >+[Sources.X64] >+ X64/SaveLongModeContext.c >+ > [Packages] > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec >@@ -61,14 +67,12 @@ > BaseLib > PrintLib > BaseMemoryLib >+ CacheMaintenanceLib > > [LibraryClasses.X64] > UefiLib > BaseMemoryLib > >-[LibraryClasses.ARM, LibraryClasses.AARCH64] >- CacheMaintenanceLib >- > [Guids] > ## SOMETIMES_PRODUCES ## Variable:L"CapsuleUpdateData" # (Process >across reset capsule image) for capsule updated data > ## SOMETIMES_PRODUCES ## Variable:L"CapsuleLongModeBuffer" # The >long mode buffer used by IA32 Capsule PEIM to call X64 CapsuleCoalesce cod= e >to handle >4GB capsule blocks >-- >2.16.2.windows.1