From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: liming.gao@intel.com) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by groups.io with SMTP; Tue, 17 Sep 2019 07:43:00 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Sep 2019 07:43:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,516,1559545200"; d="scan'208";a="180794819" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga008.jf.intel.com with ESMTP; 17 Sep 2019 07:42:59 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 17 Sep 2019 07:42:58 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 17 Sep 2019 07:42:58 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.32]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0439.000; Tue, 17 Sep 2019 22:42:56 +0800 From: "Liming Gao" To: "devel@edk2.groups.io" , "leif.lindholm@linaro.org" , Abner Chang CC: "Kinney, Michael D" , Gilbert Chen Subject: Re: [edk2-devel] [PATCH] MdePkg:Include: Update SmBios header file Thread-Topic: [edk2-devel] [PATCH] MdePkg:Include: Update SmBios header file Thread-Index: AQHVbSTUwgYbG410xkS2epcr49NcSKcvWJyAgACYMpA= Date: Tue, 17 Sep 2019 14:42:55 +0000 Message-ID: <4A89E2EF3DFEDB4C8BFDE51014F606A14E4FD801@SHSMSX104.ccr.corp.intel.com> References: <1568701470-19480-1-git-send-email-abner.chang@hpe.com> <20190917133335.GD28454@bivouac.eciton.net> In-Reply-To: <20190917133335.GD28454@bivouac.eciton.net> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjM0NGVlYjktOWQyNy00ZDZmLWExOTItMDAyYzU0MDVkNzE4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNVR3ME45cmFcLzFrZ3I0NG42XC9qMW1oekNmM09CNmY2OHBESEFONDl2STVyeEwrZ2ZRQWs0QXI4VEFOSEx4U1lqIn0= dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: liming.gao@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Abner: I add my comments.=20 > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Le= if Lindholm > Sent: Tuesday, September 17, 2019 9:34 PM > To: Abner Chang > Cc: devel@edk2.groups.io; Kinney, Michael D = ; Gao, Liming ; Gilbert Chen > > Subject: Re: [edk2-devel] [PATCH] MdePkg:Include: Update SmBios header f= ile >=20 > On Tue, Sep 17, 2019 at 02:24:30PM +0800, Abner Chang wrote: > > Update SmBios header file to conform with SMBIOS v3.3.0. >=20 > Ah, I note SMBIOS 3.3 has not yet been released - so this can not be > merged in edk2 master at this point. I did not realise this when I > requested you send the patch. Please submit BZ https://bugzilla.tianocore.org/ for this update. This is = a new feature.=20 >=20 > However, you can carry this in your edk2-staging branch, and once the > specification gets released we can take it into edk2. >=20 > (After code review, a couple of minor comments below.) >=20 > > The major update is to add definitions of SMBIOS Type 44h record. > > > > Signed-off-by: Abner Chang > > > > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Leif Lindholm > > Cc: Gilbert Chen > > > > --- > > MdePkg/Include/IndustryStandard/SmBios.h | 74 +++++++++++++++++++++++= ++++++++- > > 1 file changed, 72 insertions(+), 2 deletions(-) > > > > diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include= /IndustryStandard/SmBios.h > > index f3b6f18..ebf0ceb 100644 > > --- a/MdePkg/Include/IndustryStandard/SmBios.h > > +++ b/MdePkg/Include/IndustryStandard/SmBios.h > > @@ -3,6 +3,7 @@ > > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > > (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
> > +(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP > > SPDX-License-Identifier: BSD-2-Clause-Patent File header should be updated. Industry Standard Definitions of SMBIOS Table Specification v3.2.0. =3D=3D> Industry Standard Definitions of SMBIOS Table Specification v3.3.0. And, please refer to https://bugzilla.tianocore.org/show_bug.cgi?id=3D1099= for 3.2 update, prepare all changes for SmBios 3.3 update. Thanks Liming > > > > **/ > > @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > > #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF > > > > // > > -// SMBIOS type macros which is according to SMBIOS 2.7 specification. > > +// SMBIOS type macros which is according to SMBIOS 3.3.0 specificatio= n. > > // > > #define SMBIOS_TYPE_BIOS_INFORMATION 0 > > #define SMBIOS_TYPE_SYSTEM_INFORMATION 1 > > @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > > #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41 > > #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42 > > #define SMBIOS_TYPE_TPM_DEVICE 43 > > +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44 > > > > /// > > /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, cha= pter 3.3.43. > > @@ -727,7 +729,10 @@ typedef enum { > > ProcessorFamilyMII =3D 0x012E, > > ProcessorFamilyWinChip =3D 0x0140, > > ProcessorFamilyDSP =3D 0x015E, > > - ProcessorFamilyVideoProcessor =3D 0x01F4 > > + ProcessorFamilyVideoProcessor =3D 0x01F4, > > + ProcessorFamilyRiscvRV32 =3D 0x0200, ///< SMBIOS spec = 3.3.0 added >=20 > Please drop the "///< SMBIOS spec 3.3.0 added" comment. Here and below. >=20 > > + ProcessorFamilyRiscVRV64 =3D 0x0201, ///< SMBIOS spec = 3.3.0 added > > + ProcessorFamilyRiscVRV128 =3D 0x0202 ///< SMBIOS spec = 3.3.0 added >=20 > No further comments from me (MdePkg maintainers may have some). >=20 > / > Leif >=20 > > } PROCESSOR_FAMILY2_DATA; > > > > /// > > @@ -857,6 +862,19 @@ typedef struct { > > } PROCESSOR_FEATURE_FLAGS; > > > > typedef struct { > > + UINT32 ProcessorReserved1 :1; > > + UINT32 ProcessorUnknown :1; > > + UINT32 Processor64BitCapble :1; > > + UINT32 ProcessorMultiCore :1; > > + UINT32 ProcessorHardwareThread :1; > > + UINT32 ProcessorExecuteProtection :1; > > + UINT32 ProcessorEnhancedVirtulization :1; > > + UINT32 ProcessorPowerPerformanceCtrl :1; > > + UINT32 Processor128bitCapble :1; > > + UINT32 ProcessorReserved2 :7; > > +} PROCESSOR_CHARACTERISTIC_FLAGS; > > + > > +typedef struct { > > PROCESSOR_SIGNATURE Signature; > > PROCESSOR_FEATURE_FLAGS FeatureFlags; > > } PROCESSOR_ID_DATA; > > @@ -2508,6 +2526,57 @@ typedef struct { > > UINT8 InterfaceTypeSpecificData[4]; /= //< This field has a minimum of four bytes > > } SMBIOS_TABLE_TYPE42; > > > > + > > +/// > > +/// Processor Specific Block - Processor Architecture Type > > +/// > > +typedef enum{ > > + ProcessorSpecificBlockArchTypeReserved =3D 0x00, > > + ProcessorSpecificBlockArchTypeIa32 =3D 0x01, > > + ProcessorSpecificBlockArchTypeX64 =3D 0x02, > > + ProcessorSpecificBlockArchTypeItanium =3D 0x03, > > + ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, > > + ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, > > + ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, > > + ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, > > + ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08 > > +} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; > > + > > +/// > > +/// Processor Specific Block is the standard container of processor-s= pecific data. > > +/// > > +typedef struct { > > + UINT8 Length; > > + UINT8 ProcessorArchType; > > + /// > > + /// Below followed by Processor-specific data > > + /// > > + /// > > +} PROCESSOR_SPECIFIC_BLOCK; > > + > > +/// > > +/// Processor Additional Information(Type 44). > > +/// > > +/// The information in this structure defines the processor additiona= l information in case > > +/// SMBIOS type 4 is not sufficient to describe processor characteris= tics. > > +/// The SMBIOS type 44 structure has a reference handle field to link= back to the related > > +/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 str= uctures linked to the > > +/// same SMBIOS type 4 structure. For example, when cores are not ide= ntical in a processor, > > +/// SMBIOS type 44 structures describe different core-specific inform= ation. > > +/// > > +/// SMBIOS type 44 defines the standard header for the processor-spec= ific block, while the > > +/// contents of processor-specific data are maintained by processor > > +/// architecture workgroups or vendors in separate documents. > > +/// > > +typedef struct { > > + SMBIOS_STRUCTURE Hdr; > > + SMBIOS_HANDLE RefHandle; ///< T= his field refer to associated SMBIOS type 4 > > + /// > > + /// Below followed by Processor-specific block > > + /// > > + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock; > > +} SMBIOS_TABLE_TYPE44; > > + > > /// > > /// TPM Device (Type 43). > > /// > > @@ -2586,6 +2655,7 @@ typedef union { > > SMBIOS_TABLE_TYPE41 *Type41; > > SMBIOS_TABLE_TYPE42 *Type42; > > SMBIOS_TABLE_TYPE43 *Type43; > > + SMBIOS_TABLE_TYPE44 *Type44; > > SMBIOS_TABLE_TYPE126 *Type126; > > SMBIOS_TABLE_TYPE127 *Type127; > > UINT8 *Raw; > > -- > > 2.7.4 > > >=20 >=20