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Received: from DM6PR12MB3163.namprd12.prod.outlook.com (20.179.71.154) by DM6PR12MB3675.namprd12.prod.outlook.com (10.255.76.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2451.28; Wed, 20 Nov 2019 20:07:46 +0000 Received: from DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::dd0c:8e53:4913:8ef4]) by DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::dd0c:8e53:4913:8ef4%5]) with mapi id 15.20.2451.031; Wed, 20 Nov 2019 20:07:46 +0000 From: "Lendacky, Thomas" To: devel@edk2.groups.io Cc: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Michael D Kinney , Liming Gao , Eric Dong , Ray Ni , Brijesh Singh Subject: [RFC PATCH v3 29/43] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Date: Wed, 20 Nov 2019 14:06:51 -0600 Message-Id: <4a8c1f5360f7327b26cb141f60c42cbe858eb398.1574280425.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-ClientProxiedBy: DM3PR12CA0087.namprd12.prod.outlook.com (2603:10b6:0:57::31) To DM6PR12MB3163.namprd12.prod.outlook.com (2603:10b6:5:15e::26) Return-Path: thomas.lendacky@amd.com MIME-Version: 1.0 X-Mailer: git-send-email 2.17.1 X-Originating-IP: [165.204.77.1] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: fbe94b5e-f272-4aae-18ad-08d76df54f14 X-MS-TrafficTypeDiagnostic: DM6PR12MB3675: X-MS-Exchange-PUrlCount: 1 X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-Forefront-PRVS: 02272225C5 X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(1496009)(4636009)(376002)(346002)(396003)(39860400002)(366004)(136003)(189003)(199004)(2361001)(50226002)(81156014)(81166006)(8676002)(2906002)(6486002)(99286004)(66476007)(486006)(47776003)(66556008)(25786009)(2616005)(476003)(54906003)(11346002)(118296001)(8936002)(316002)(2351001)(7736002)(305945005)(66066001)(6916009)(86362001)(16586007)(3846002)(6116002)(48376002)(14454004)(478600001)(966005)(5660300002)(66946007)(446003)(76176011)(36756003)(51416003)(6506007)(386003)(50466002)(52116002)(4326008)(6436002)(14444005)(6666004)(6306002)(6512007)(26005)(186003);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR12MB3675;H:DM6PR12MB3163.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gEEdZGPTTggQs7oFKmKPPgyObwz7+kIYoRbNu7d8zlwRuZ4w6Y8S5gjWnado/77btGwlbgdsCDCFrnWeuPQWu8siFE9panuZi9bfvNO/D8DJX+t2b7kqmz+IbihhTnCYyhcoChsSknHgNrydx4LPdgvtJyysUdrUjyB1Mj5q37d/o9pyilAx9fPEgRSUCSR9/9KRYFMLERv/xaB995T6hr4m+FqJ73LIFA+4MfsGTY9q3f3pzJefoqYHi0MmSXRRXgbGT02pIDlyhGj0pATxpS3+5qIliPiRYvsbiEu+9Q3d4ZAru93EPtptcNFFUK/DvtXM9gT1eChsR0RiF2dMQjLXMuCHp7T39+1DWpilJK9JZu3frD8gTxD3HUVEeEunav+DTil1Esgm0oIn4D4XyMEwSvU2ab1kllfXvQt+8v6yLvsF0Q12i/fIekj63fo48g0xyC5varKbUIn6UINd83B4iXRgh8kV6hM8zYZYzvU= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: fbe94b5e-f272-4aae-18ad-08d76df54f14 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2019 20:07:45.9215 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tYedH6QdAEucGjV2uPv+M4X0bYyGD7H9pFw3z0y5V1aFPWiq0Nw1lFaysJm2FVZQvi8G6E+GmpUcOW4buxPJAg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3675 Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 The SEV support will clear the C-bit from non-RAM areas. The early GDT lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT will be read as un-encrypted even though it is encrypted. This will result in a failure to be able to handle the exception. Move the GDT into RAM so it can be accessed without error when running as an SEV-ES guest. Cc: Jordan Justen Cc: Laszlo Ersek Cc: Ard Biesheuvel Reviewed-by: Laszlo Ersek Signed-off-by: Tom Lendacky --- OvmfPkg/PlatformPei/AmdSev.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c index 900b0d977d61..b3fd2d86541a 100644 --- a/OvmfPkg/PlatformPei/AmdSev.c +++ b/OvmfPkg/PlatformPei/AmdSev.c @@ -37,6 +37,8 @@ AmdSevEsInitialize ( PHYSICAL_ADDRESS GhcbBasePa; UINTN GhcbPageCount; RETURN_STATUS PcdStatus, DecryptStatus; + IA32_DESCRIPTOR Gdtr; + VOID *Gdt; if (!MemEncryptSevEsIsEnabled ()) { return; @@ -74,6 +76,22 @@ AmdSevEsInitialize ( (UINT64)GhcbPageCount, GhcbBase)); AsmWriteMsr64 (MSR_SEV_ES_GHCB, GhcbBasePa); + + // + // The SEV support will clear the C-bit from non-RAM areas. The early GDT + // lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT + // will be read as un-encrypted even though it was created before the C-bit + // was cleared (encrypted). This will result in a failure to be able to + // handle the exception. + // + AsmReadGdtr (&Gdtr); + + Gdt = AllocatePages (EFI_SIZE_TO_PAGES ((UINTN) Gdtr.Limit + 1)); + ASSERT (Gdt != NULL); + + CopyMem (Gdt, (VOID *) Gdtr.Base, Gdtr.Limit + 1); + Gdtr.Base = (UINTN) Gdt; + AsmWriteGdtr (&Gdtr); } /** -- 2.17.1