From: Ming <ming.huang@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org,
graeme.gregory@linaro.org, ard.biesheuvel@linaro.org,
guoheyi@huawei.com, wanghuiqiang@huawei.com,
huangming23@huawei.com, zhangjinsong2@huawei.com,
huangdaode@hisilicon.com, john.garry@huawei.com,
xinliang.liu@linaro.org, Heyi Guo <heyi.guo@linaro.org>
Subject: Re: [PATCH edk2-platforms v1 06/38] Hisilicon/D06: Add OemMiscLibD06
Date: Wed, 8 Aug 2018 11:49:41 +0800 [thread overview]
Message-ID: <4c257630-9358-c376-0f57-9693039758d5@linaro.org> (raw)
In-Reply-To: <20180802172241.472liylnkoypx6se@bivouac.eciton.net>
在 8/3/2018 1:22 AM, Leif Lindholm 写道:
> On Tue, Jul 24, 2018 at 03:08:50PM +0800, Ming Huang wrote:
>> This library include BoardFeatureD06.c and OemMiscLibD06.c c file,
>> use for several modules like PciHostBridgeLib and Smbios.
>> Enlarge macro PCIEDEVICE_REPORT_MAX for D06.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <ming.huang@linaro.org>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D06/D06.dsc | 1 +
>> Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c | 432 ++++++++++++++++++++
>> Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni | Bin 0 -> 5204 bytes
>
> We appear to be permitting UTF-8 these days, which would be easier to
> review. Would you be able to convert this for the next revision?
>
Yes.
Could you tell me how to convert the .uni to UTF8?
>> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 157 +++++++
>> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf | 47 +++
>> Silicon/Hisilicon/Include/Library/OemMiscLib.h | 2 +-
>> 6 files changed, 638 insertions(+), 1 deletion(-)
>>
>> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
>> index 88869ba26e..f4dfef1087 100644
>> --- a/Platform/Hisilicon/D06/D06.dsc
>> +++ b/Platform/Hisilicon/D06/D06.dsc
>> @@ -71,6 +71,7 @@
>>
>> TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
>> RealTimeClockLib|Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
>> + OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>> OemAddressMapLib|Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.inf
>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf
>>
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c
>> new file mode 100644
>> index 0000000000..c8f6cd0e29
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c
>> @@ -0,0 +1,432 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <Uefi.h>
>> +#include <IndustryStandard/SmBios.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/HiiLib.h>
>> +#include <Library/I2CLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/OemMiscLib.h>
>> +#include <Library/SerdesLib.h>
>> +#include <Protocol/Smbios.h>
>> +
>> +#include <PlatformArch.h>
>> +
>> +I2C_DEVICE gDS3231RtcDevice = {
>
> *cough* *cough*
>
The name of global variable will be modify by another patch.
>> + .Socket = 0,
>> + .Port = 5,
>> + .DeviceType = DEVICE_TYPE_SPD,
>> + .SlaveDeviceAddress = 0x68
>> +};
>> +
>> +SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[] =
>> +{
>> + {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
>> +};
>> +
>> +SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] =
>> +{
>> + {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
>> +};
>> +
>> +SERDES_PARAM gSerdesParamNA = {
>> + .Hilink0Mode = EmHilink0Hccs1X8Width16,
>> + .Hilink1Mode = EmHilink1Hccs0X8Width16,
>> + .Hilink2Mode = EmHilink2Pcie2X8,
>> + .Hilink3Mode = 0x0,
>> + .Hilink4Mode = 0xF,
>> + .Hilink5Mode = EmHilink5Sas1X4,
>> + .Hilink6Mode = 0x0,
>> + .UseSsc = 0,
>> +};
>> +
>> +SERDES_PARAM gSerdesParamNB = {
>> + .Hilink0Mode = EmHilink0Pcie1X8,
>> + .Hilink1Mode = EmHilink1Pcie0X8,
>> + .Hilink2Mode = EmHilink2Sas0X8,
>> + .Hilink3Mode = 0x0,
>> + .Hilink4Mode = 0xF,
>> + .Hilink5Mode = EmHilink5Pcie2X2Pcie3X2,
>> + .Hilink6Mode = 0xF,
>> + .UseSsc = 0,
>> +};
>> +
>> +SERDES_PARAM gSerdesParamS1NA = {
>> + .Hilink0Mode = EmHilink0Hccs1X8Width16,
>> + .Hilink1Mode = EmHilink1Hccs0X8Width16,
>> + .Hilink2Mode = EmHilink2Pcie2X8,
>> + .Hilink3Mode = 0x0,
>> + .Hilink4Mode = 0xF,
>> + .Hilink5Mode = EmHilink5Sas1X4,
>> + .Hilink6Mode = 0x0,
>> + .UseSsc = 0,
>> +};
>> +
>> +SERDES_PARAM gSerdesParamS1NB = {
>> + .Hilink0Mode = EmHilink0Pcie1X8,
>> + .Hilink1Mode = EmHilink1Pcie0X8,
>> + .Hilink2Mode = EmHilink2Sas0X8,
>> + .Hilink3Mode = 0x0,
>> + .Hilink4Mode = 0xF,
>> + .Hilink5Mode = EmHilink5Pcie2X2Pcie3X2,
>> + .Hilink6Mode = 0xF,
>> + .UseSsc = 0,
>> +};
>> +
>> +
>> +EFI_STATUS
>> +OemGetSerdesParam (
>> + OUT SERDES_PARAM *ParamA,
>> + OUT SERDES_PARAM *ParamB,
>> + IN UINT32 SocketId
>> + )
>> +{
>> + if (NULL == ParamA) {
>> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__));
>> + return EFI_INVALID_PARAMETER;
>> + } if (NULL == ParamB) {
>> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__));
>> + return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + if (0 == SocketId) {
>> + (VOID) CopyMem (ParamA, &gSerdesParamNA, sizeof (*ParamA));
>> + (VOID) CopyMem (ParamB, &gSerdesParamNB, sizeof (*ParamB));
>> + } else {
>> + (VOID) CopyMem (ParamA, &gSerdesParamS1NA, sizeof (*ParamA));
>> + (VOID) CopyMem (ParamB, &gSerdesParamS1NB, sizeof (*ParamB));
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +VOID
>> +OemPcieResetAndOffReset (
>> + VOID
>> + )
>> +{
>> + return;
>> +}
>> +
>> +SMBIOS_TABLE_TYPE9 gPcieSlotInfo[] = {
>> + // PCIe0 Slot 1
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX16, // SlotType
>> + SlotDataBusWidth16X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0001, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>
> Alignment of that :1.
>
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0002, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>
> Alignment of that :1.
>
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0003, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>
> Alignment of that :1.
>
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> +
>> +
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0004, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>
> Alignment of that :1.
>
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> +
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX16, // SlotType
>> + SlotDataBusWidth16X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0005, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>
> Alignment of that :1.
> (I'm going to stop now. Please address for all instances.)
>
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0006, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0007, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> + {
>> + { // Hdr
>> + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
>> + 0, // Length,
>> + 0 // Handle
>> + },
>> + 1, // SlotDesignation
>> + SlotTypePciExpressX8, // SlotType
>> + SlotDataBusWidth8X, // SlotDataBusWidth
>> + SlotUsageAvailable, // SlotUsage
>> + SlotLengthOther, // SlotLength
>> + 0x0008, // SlotId
>> + { // SlotCharacteristics1
>> + 0, // CharacteristicsUnknown :1;
>> + 0, // Provides50Volts :1;
>> + 0, // Provides33Volts :1;
>> + 0, // SharedSlot :1;
>> + 0, // PcCard16Supported :1;
>> + 0, // CardBusSupported :1;
>> + 0, // ZoomVideoSupported :1;
>> + 0 // ModemRingResumeSupported:1;
>> + },
>> + { // SlotCharacteristics2
>> + 0, // PmeSignalSupported :1;
>> + 0, // HotPlugDevicesSupported :1;
>> + 0, // SmbusSignalSupported :1;
>> + 0 // Reserved :5;
>> + },
>> + 0x00, // SegmentGroupNum
>> + 0x00, // BusNum
>> + 0 // DevFuncNum
>> + },
>> +
>> + };
>> +
>> +UINT8
>> +OemGetPcieSlotNumber (
>> + VOID
>> + )
>> +{
>> + return sizeof (gPcieSlotInfo) / sizeof (SMBIOS_TABLE_TYPE9);
>> +}
>> +
>> +EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM] = {
>> + {{STRING_TOKEN(STR_LEMON_C10_DIMM_000), STRING_TOKEN(STR_LEMON_C10_DIMM_001)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_010), STRING_TOKEN(STR_LEMON_C10_DIMM_011)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_020), STRING_TOKEN(STR_LEMON_C10_DIMM_021)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_030), STRING_TOKEN(STR_LEMON_C10_DIMM_031)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_040), STRING_TOKEN(STR_LEMON_C10_DIMM_041)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_050), STRING_TOKEN(STR_LEMON_C10_DIMM_051)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_060), STRING_TOKEN(STR_LEMON_C10_DIMM_061)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_070), STRING_TOKEN(STR_LEMON_C10_DIMM_071)}},
>> +
>> + {{STRING_TOKEN(STR_LEMON_C10_DIMM_100), STRING_TOKEN(STR_LEMON_C10_DIMM_101)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_110), STRING_TOKEN(STR_LEMON_C10_DIMM_111)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_120), STRING_TOKEN(STR_LEMON_C10_DIMM_121)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_130), STRING_TOKEN(STR_LEMON_C10_DIMM_131)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_140), STRING_TOKEN(STR_LEMON_C10_DIMM_141)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_150), STRING_TOKEN(STR_LEMON_C10_DIMM_151)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_160), STRING_TOKEN(STR_LEMON_C10_DIMM_161)},
>> + {STRING_TOKEN(STR_LEMON_C10_DIMM_170), STRING_TOKEN(STR_LEMON_C10_DIMM_171)}}
>> +};
>> +
>> +EFI_HII_HANDLE
>> +EFIAPI
>> +OemGetPackages (
>> + VOID
>> + )
>> +{
>> + return HiiAddPackages (
>> + &gEfiCallerIdGuid,
>> + NULL,
>> + OemMiscLibStrings,
>> + NULL,
>> + NULL
>> + );
>> +}
>> +
>> +
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni
>> new file mode 100644
>> index 0000000000..f3994d9d4d
>> Binary files /dev/null and b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni differ
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> new file mode 100644
>> index 0000000000..009a53b2c8
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> @@ -0,0 +1,157 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <Uefi.h>
>> +#include <PlatformArch.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/LpcLib.h>
>> +#include <Library/OemAddressMapLib.h>
>> +#include <Library/OemMiscLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PlatformSysCtrlLib.h>
>> +#include <Library/SerdesLib.h>
>> +#include <Library/SerialPortLib.h>
>> +#include <Library/TimerLib.h>
>> +
>> +REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
>> + {67,0,0,0},
>> + {225,0,0,3},
>> + {0xFFFF,0xFFFF,0xFFFF,0xFFFF},
>> + {0xFFFF,0xFFFF,0xFFFF,0xFFFF}
>> +};
>> +
>> +// Right now we only support 1P
>> +BOOLEAN
>> +OemIsSocketPresent (
>> + UINTN Socket
>> + )
>> +{
>> + UINT32 SocketMask = PcdGet32 (PcdSocketMask);
>> + return (BOOLEAN)((SocketMask & (1 << Socket)) ? TRUE : FALSE);
>> +}
>> +
>> +
>> +UINTN
>> +OemGetSocketNumber (
>> + VOID
>> + )
>> +{
>> + if(!OemIsMpBoot ()) {
>> + return 1;
>> + }
>> +
>> + return 2;
>
> What is 2?
> (Guessing NUMBER_PROCESSOR_SOCKETS.)
>
Exactly.
Modify 2 to MAX_SOCKET(defined in PlatformArch.h)?
>> +}
>> +
>> +
>> +UINTN
>> +OemGetDdrChannel (
>> + VOID
>> + )
>> +{
>> + return 8;
>
> What is 8?
> (Guessing NUMBER_MEMORY_CHANNELS.)
>
Exactly.
Modify 8 to MAX_CHANNEL(defined in PlatformArch.h)?
>> +}
>> +
>> +
>> +UINTN
>> +OemGetDimmSlot (
>> + UINTN Socket,
>> + UINTN Channel
>> + )
>> +{
>> + return 2;
>
> What is 2?
> (Guessing SLOTS_PER_DDR_CHANNEL.)
>
Yes.
Modify 8 to MAX_DIMM(defined in PlatformArch.h)?
>> +}
>> +
>> +
>> +// Nothing to do for EVB
>> +VOID
>> +OemPostEndIndicator (
>> + VOID
>> + )
>> +{
>> + DEBUG ((DEBUG_ERROR,"M3 release reset CONFIG........."));
>
> DEBUG_INFO.
>
>> +
>> + MmioWrite32 (0xd0002180, 0x3);
>> + MmioWrite32 (0xd0002194, 0xa4);
>> + MmioWrite32 (0xd0000a54, 0x1);
>
> Please create some #defines for those addresses, and those values.
>
After search all source code, this function is not invoked for D06.
I will remove it.
>> +
>> + MicroSecondDelay (10000);
>
> Why 10000?
> Is a MemoryFence () needed?
>
>> +
>> + MmioWrite32 (0xd0002108, 0x1);
>> + MmioWrite32 (0xd0002114, 0x1);
>> + MmioWrite32 (0xd0002120, 0x1);
>> + MmioWrite32 (0xd0003108, 0x1);
>
> Please create some #defines for those addresses, and those values.
>
>> +
>> + MicroSecondDelay (500000);
>
> Why 500000?
> Is a MemoryFence () needed?
>
>> + DEBUG ((DEBUG_ERROR, "Done\n"));
>
> DEBUG_INFO.
>
>> +}
>> +
>> +
>> +
>> +VOID
>> +CoreSelectBoot (
>> + VOID
>> + )
>> +{
>> + if (!PcdGet64 (PcdTrustedFirmwareEnable))
>> + {
>> + StartupAp ();
>> + }
>> +
>> + return;
>> +}
>> +
>> +BOOLEAN
>> +OemIsMpBoot (
>> + VOID
>> + )
>> +{
>> + return PcdGet32 (PcdIsMPBoot);
>> +}
>> +
>> +VOID
>> +OemLpcInit (
>> + VOID
>> + )
>> +{
>> + LpcInit ();
>> + return;
>> +}
>> +
>> +UINT32
>> +OemIsWarmBoot (
>> + VOID
>> + )
>> +{
>> + return 0;
>> +}
>> +
>> +VOID
>> +OemBiosSwitch (
>> + UINT32 Master
>> + )
>> +{
>> + (VOID)Master;
>> + return;
>> +}
>> +
>> +BOOLEAN
>> +OemIsNeedDisableExpanderBuffer (
>> + VOID
>> + )
>> +{
>> + return TRUE;
>> +}
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>> new file mode 100644
>> index 0000000000..acb7366078
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>> @@ -0,0 +1,47 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x0001001A
>> + BASE_NAME = OemMiscLib
>> + FILE_GUID = 3002911C-C160-4C46-93BB-782846673EEA
>> + MODULE_TYPE = BASE
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = OemMiscLib
>> +
>> +[Sources.common]
>> + BoardFeatureD06.c
>> + OemMiscLibD06.c
>> + BoardFeatureD06Strings.uni
>
> Please sort files alphabetically.
>
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + PcdLib
>> + TimerLib
>> + SerdesLib
>
> Please sort Libraries alphabetically.
>
>> +
>> +[Ppis]
>> + gEfiPeiReadOnlyVariable2PpiGuid ## SOMETIMES_CONSUMES
>> +
>> +[Pcd]
>> + gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable
>> + gHisiTokenSpaceGuid.PcdSocketMask
>> + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
>> + gHisiTokenSpaceGuid.PcdIsMPBoot
>
> Please sort Pcds alphabetically (where there is not a more logical
> grouping).
>
>> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> index 6f18c0fa72..53e7a37a68 100644
>> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> @@ -22,7 +22,7 @@
>> #include <PlatformArch.h>
>> #include <Library/I2CLib.h>
>>
>> -#define PCIEDEVICE_REPORT_MAX 4
>> +#define PCIEDEVICE_REPORT_MAX 8
>
> Does this have any impact on existing platforms?
> Boot-time?
>
This have no impact on existing platform, just enlarge the
global array. This is used for SMBIOS.
Ming
> /
> Leif
>
>> typedef struct _REPORT_PCIEDIDVID2BMC{
>> UINTN Bus;
>> UINTN Device;
>> --
>> 2.17.0
>>
next prev parent reply other threads:[~2018-08-08 3:49 UTC|newest]
Thread overview: 153+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-24 7:08 [PATCH edk2-platforms v1 00/38] Upload for D06 platform Ming Huang
2018-07-24 7:08 ` [PATCH edk2-platforms v1 01/38] Silicon/Hisilicon: Modify the MRC interface for other module Ming Huang
2018-08-02 14:42 ` Leif Lindholm
2018-08-05 3:35 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 02/38] Silicon/Hisilicon: Separate PlatformArch.h Ming Huang
2018-08-02 14:56 ` Leif Lindholm
2018-08-05 15:11 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 03/38] Hisilicon/D06: Add several basal file for D06 Ming Huang
2018-08-02 16:14 ` Leif Lindholm
2018-08-05 15:06 ` Ming
2018-08-06 3:01 ` Ming
2018-08-06 9:57 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 04/38] Platform/Hisilicon/D06: Add M41T83RealTimeClockLib Ming Huang
2018-08-02 16:56 ` Leif Lindholm
2018-08-08 8:02 ` Ming
2018-08-08 9:12 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 05/38] Platform/Hisilicon/D06: Add binary file for D06 Ming Huang
2018-08-02 17:05 ` Leif Lindholm
2018-08-07 15:04 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 06/38] Hisilicon/D06: Add OemMiscLibD06 Ming Huang
2018-08-02 17:22 ` Leif Lindholm
2018-08-08 3:49 ` Ming [this message]
2018-08-08 9:43 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 07/38] Silicon/Hisilicon/D06: Wait for all disk ready Ming Huang
2018-08-02 17:36 ` Leif Lindholm
2018-08-08 9:02 ` Ming
2018-08-08 9:59 ` Leif Lindholm
2018-08-08 11:44 ` Ming
2018-08-08 12:53 ` Leif Lindholm
2018-08-10 1:44 ` Ming
2018-08-14 15:26 ` Leif Lindholm
2018-08-15 4:01 ` Ming
2018-08-15 13:12 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 08/38] Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe Ming Huang
2018-08-02 17:39 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 09/38] Hisilicon/D06: Add Debug Serial Port Init Driver Ming Huang
2018-08-02 18:10 ` Leif Lindholm
2018-08-08 7:37 ` Ming
2018-08-08 10:01 ` Leif Lindholm
2018-08-08 14:48 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 10/38] Hisilicon/D06: Add ACPI Tables for D06 Ming Huang
2018-08-02 18:13 ` Leif Lindholm
2018-08-02 18:24 ` Ard Biesheuvel
2018-07-24 7:08 ` [PATCH edk2-platforms v1 11/38] Hisilicon/D06: Add Hi1620OemConfigUiLib Ming Huang
2018-08-03 10:24 ` Leif Lindholm
2018-08-08 12:09 ` Ming
2018-08-11 6:35 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 12/38] Silicon/Hisilicon/D06: Stop watchdog Ming Huang
2018-08-03 10:28 ` Leif Lindholm
2018-08-08 9:49 ` Ming
2018-08-03 10:31 ` Ard Biesheuvel
2018-08-09 11:40 ` Ming
2018-08-09 11:53 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 13/38] Silicon/Hisilicon/Acpi: Move some macro to PlatformArch.h Ming Huang
2018-08-03 10:37 ` Leif Lindholm
2018-08-08 12:22 ` Ming
2018-08-08 12:57 ` Leif Lindholm
2018-07-24 7:08 ` [PATCH edk2-platforms v1 14/38] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 Ming Huang
2018-08-03 10:40 ` Leif Lindholm
2018-08-08 14:33 ` Ming
2018-07-24 7:08 ` [PATCH edk2-platforms v1 15/38] Silicon/Hisilicon/I2C: Optimize I2C library Ming Huang
2018-08-03 13:24 ` Leif Lindholm
2018-08-08 14:41 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 16/38] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config Ming Huang
2018-08-03 13:28 ` Leif Lindholm
2018-08-09 3:59 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 17/38] Silicon/Hisilicon/D06: Optimize HNS config CDR post time Ming Huang
2018-08-03 13:30 ` Leif Lindholm
2018-08-08 14:54 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 18/38] Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" Ming Huang
2018-08-03 13:32 ` Leif Lindholm
2018-08-09 0:35 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 19/38] Hisilicon/Hi1620: Add ACPI PPTT table Ming Huang
2018-08-03 13:42 ` Leif Lindholm
2018-08-09 0:52 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 20/38] Platform/Hisilicon/D06: Enable ACPI PPTT Ming Huang
2018-08-03 13:43 ` Leif Lindholm
2018-07-24 7:09 ` [PATCH edk2-platforms v1 21/38] Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h Ming Huang
2018-08-03 13:44 ` Leif Lindholm
2018-07-24 7:09 ` [PATCH edk2-platforms v1 22/38] Platform/Hisilicon/D06: Add OemNicLib Ming Huang
2018-08-03 14:36 ` Leif Lindholm
2018-08-09 6:16 ` Ming
2018-08-09 10:19 ` Leif Lindholm
2018-08-09 14:41 ` Ming
2018-08-14 2:38 ` Ming
2018-08-14 15:48 ` Leif Lindholm
2018-08-15 11:08 ` Ming
2018-08-15 13:22 ` Leif Lindholm
2018-08-15 14:16 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 23/38] Hisilicon/D0X: Rename the global variable gDS3231RtcDevice Ming Huang
2018-08-03 15:20 ` Leif Lindholm
2018-08-09 6:22 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 24/38] Platform/Hisilicon/D06: Add OemNicConfig2P Driver Ming Huang
2018-08-03 15:23 ` Leif Lindholm
2018-08-09 6:24 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 25/38] Hisilicon/D0x: Update SMBIOS type9 info Ming Huang
2018-08-04 9:28 ` Leif Lindholm
2018-08-09 6:34 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 26/38] Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h Ming Huang
2018-08-04 9:34 ` Leif Lindholm
2018-08-09 6:37 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 27/38] Platform/Hisilicon/D06: Add EarlyConfigPeim peim Ming Huang
2018-08-04 9:59 ` Leif Lindholm
2018-08-09 7:07 ` Ming
2018-08-09 10:27 ` Leif Lindholm
2018-08-09 11:54 ` Ming
2018-08-14 2:31 ` Ming
2018-08-14 15:42 ` Leif Lindholm
2018-07-24 7:09 ` [PATCH edk2-platforms v1 28/38] Hisilicon/D0x: Unify FlashFvbDxe driver Ming Huang
2018-08-04 10:06 ` Leif Lindholm
2018-08-09 7:15 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 29/38] Platform/Hisilicon/D06: Add PciHostBridgeLib Ming Huang
2018-08-04 13:41 ` Leif Lindholm
2018-08-09 7:22 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 30/38] Hisilicon/D06: add apei driver Ming Huang
2018-08-04 14:47 ` Leif Lindholm
2018-08-10 2:46 ` Ming
2018-08-14 15:39 ` Leif Lindholm
2018-08-15 8:57 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 31/38] Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h Ming Huang
2018-08-04 14:58 ` Leif Lindholm
2018-08-09 12:02 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 32/38] Platform/Hisilicon/D06: Add capsule upgrade support Ming Huang
2018-08-04 15:08 ` Leif Lindholm
2018-07-24 7:09 ` [PATCH edk2-platforms v1 33/38] Silicon/Hisilicon/D06: Modify for close slave core clock Ming Huang
2018-08-04 15:14 ` Leif Lindholm
2018-08-09 12:15 ` Ming
2018-08-09 12:27 ` Leif Lindholm
2018-08-10 2:05 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 34/38] Silicon/Hisilicon/D06: Add I2C Bus Exception deal function Ming Huang
2018-08-04 15:18 ` Leif Lindholm
2018-08-10 2:19 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 35/38] Silicon/Hisilicon/Setup: Support SPCR table switch Ming Huang
2018-08-04 15:20 ` Leif Lindholm
2018-08-09 14:17 ` Ming
2018-08-09 14:44 ` Leif Lindholm
2018-08-09 15:40 ` Ming
2018-08-09 15:48 ` Leif Lindholm
2018-07-24 7:09 ` [PATCH edk2-platforms v1 36/38] Silicon/Hisilicon/setup: Support SMMU switch Ming Huang
2018-08-06 9:59 ` Leif Lindholm
2018-08-09 14:19 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 37/38] Hisilicon/D06: Add PciPlatformLib Ming Huang
2018-08-06 10:01 ` Leif Lindholm
2018-08-09 14:27 ` Ming
2018-07-24 7:09 ` [PATCH edk2-platforms v1 38/38] Platform/Hisilicon/D0x: Update version string to 18.08 Ming Huang
2018-08-06 10:03 ` Leif Lindholm
2018-08-09 14:29 ` Ming
2018-08-01 21:56 ` [PATCH edk2-platforms v1 00/38] Upload for D06 platform Leif Lindholm
2018-08-02 1:46 ` Ming
2018-08-02 3:17 ` 答复: " Guoheyi
2018-08-02 10:12 ` Leif Lindholm
2018-08-02 15:36 ` Graeme Gregory
2018-08-04 14:26 ` Ming
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