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Tue, 6 Dec 2022 07:23:43 -0600 From: "Abdul Lateef Attar" To: CC: Abdul Lateef Attar , Abner Chang , Garrett Kirkendall , "Paul Grimes" , Eric Dong , Ray Ni , Rahul Kumar Subject: [PATCH v1 1/5] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Date: Tue, 6 Dec 2022 18:53:14 +0530 Message-ID: <4c6e06ace12701059f409fc146c227cc28c5ca6b.1670332633.git.abdattar@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Return-Path: AbdulLateef.Attar@amd.com X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT078:EE_|DM6PR12MB4282:EE_ X-MS-Office365-Filtering-Correlation-Id: ca7e7546-582c-4c01-a9b5-08dad78d1ac3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sWx+fVzn5oIBZ8qmRNRtcW46xnZsnSzG8s/a7jGphGNCVVaSOjANHE+WqH6OHElhc1uXl2RXfAq/HecC4ZXmRWdw8/S+TLobP7IZVaHjc7tTJjuyZoqkKF31K/Zt54M0BnScwz4aS0Cs0Kn/7tzPndNqcw9+KPQJvj/HwNJExH/3DLUJXYLBlbGDslXCnQLcQAPdEZICnuMUkCf5T7KwrOsXxH6xDuTH2OcxPQJcFQYcRZixioGzJFl2njfK5FLb+niyXO32rCc/wPJZTF3A/49D28tMIxICQZTnE+D7ZD3JsNuT8lnNQxdhLOoE0veLzeW+L2TEewKrfqzYUmiTXW4FymnpSMavYl8VcnE7vpv46I2anl/22xPqHEL1FAXKsKIXcPm6oC+d7N1n8iBfdy7WZ9VbrCvyrfC9lmcIx4WMzdk8Rmzj3iJUULcK5ERiN4/5qSIhH6px/8WwXwaDstQ2G2Qww5rSaLdOjMszXs3njSusyEtE53e7+zR858t15oqh5c6VQKZna8OLNdkL7qBAc8WjrvR0aXWgOYjwQvy73bfiAEpDsrcciaFmKkk6xcrQ8Y5l21Ig9I+vy2rubdlVCAEWK3CRaHxBMSieflOmJDyLhcygm/fYq14NSd0kX5iPx3q3oGUa6BZdWa4WsTtz5h4IXvCDSL3jG/u902tpieYE4d2wwJeAntFV8PDL2g18Cp7sG0wD29DyxLaXSBiwVrqIwhKwDFyVzJQPeWu9aoJlXsFnQF4bf8u8IknrdWZTWK3xUVR9Tyihu6lWDA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(376002)(396003)(136003)(451199015)(46966006)(40470700004)(36840700001)(2906002)(19627235002)(8676002)(4326008)(70206006)(30864003)(70586007)(966005)(54906003)(40460700003)(5660300002)(36756003)(336012)(6916009)(316002)(6666004)(40480700001)(26005)(8936002)(478600001)(7696005)(83380400001)(81166007)(356005)(186003)(47076005)(2616005)(41300700001)(426003)(36860700001)(82740400003)(82310400005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2022 13:23:46.4956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca7e7546-582c-4c01-a9b5-08dad78d1ac3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT078.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4282 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Abdul Lateef Attar BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4182 moves Intel-specific code to the arch-dependent file. Other processor families might have different implementation of these functions. Hence, moving out of the common file. Cc: Abner Chang Cc: Garrett Kirkendall Cc: Paul Grimes Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Abdul Lateef Attar --- .../IntelSmmCpuFeaturesLib.c | 140 ++++++++++++++++++ .../SmmCpuFeaturesLibCommon.c | 140 ------------------ 2 files changed, 140 insertions(+), 140 deletions(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c = b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c index d5eaaa7a991e..994267f393b3 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c @@ -400,3 +400,143 @@ SmmCpuFeaturesSetSmmRegister ( AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);=0D }=0D }=0D +=0D +/**=0D + This function updates the SMRAM save state on the currently executing CP= U=0D + to resume execution at a specific address after an RSM instruction. Thi= s=0D + function must evaluate the SMRAM save state to determine the execution m= ode=0D + the RSM instruction resumes and update the resume execution address with= =0D + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start=0D + flag in the SMRAM save state must always be cleared. This function retu= rns=0D + the value of the instruction pointer from the SMRAM save state that was= =0D + replaced. If this function returns 0, then the SMRAM save state was not= =0D + modified.=0D +=0D + This function is called during the very first SMI on each CPU after=0D + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de=0D + to signal that the SMBASE of each CPU has been updated before the defaul= t=0D + SMBASE address is used for the first SMI to the next CPU.=0D +=0D + @param[in] CpuIndex The index of the CPU to hook. The v= alue=0D + must be between 0 and the NumberOfCp= us=0D + field in the System Management Syste= m Table=0D + (SMST).=0D + @param[in] CpuState Pointer to SMRAM Save State Map for = the=0D + currently executing CPU.=0D + @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to=0D + 32-bit execution mode from 64-bit SM= M.=0D + @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to=0D + same execution mode as SMM.=0D +=0D + @retval 0 This function did modify the SMRAM save state.=0D + @retval > 0 The original instruction pointer value from the SMRAM save = state=0D + before it was replaced.=0D +**/=0D +UINT64=0D +EFIAPI=0D +SmmCpuFeaturesHookReturnFromSmm (=0D + IN UINTN CpuIndex,=0D + IN SMRAM_SAVE_STATE_MAP *CpuState,=0D + IN UINT64 NewInstructionPointer32,=0D + IN UINT64 NewInstructionPointer=0D + )=0D +{=0D + return 0;=0D +}=0D +=0D +/**=0D + Read an SMM Save State register on the target processor. If this functi= on=0D + returns EFI_UNSUPPORTED, then the caller is responsible for reading the= =0D + SMM Save Sate register.=0D +=0D + @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The=0D + value must be between 0 and the NumberOfCpus field= in=0D + the System Management System Table (SMST).=0D + @param[in] Register The SMM Save State register to read.=0D + @param[in] Width The number of bytes to read from the CPU save stat= e.=0D + @param[out] Buffer Upon return, this holds the CPU register value rea= d=0D + from the save state.=0D +=0D + @retval EFI_SUCCESS The register was read from Save State.=0D + @retval EFI_INVALID_PARAMETER Buffer is NULL.=0D + @retval EFI_UNSUPPORTED This function does not support reading Reg= ister.=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +SmmCpuFeaturesReadSaveStateRegister (=0D + IN UINTN CpuIndex,=0D + IN EFI_SMM_SAVE_STATE_REGISTER Register,=0D + IN UINTN Width,=0D + OUT VOID *Buffer=0D + )=0D +{=0D + return EFI_UNSUPPORTED;=0D +}=0D +=0D +/**=0D + Writes an SMM Save State register on the target processor. If this func= tion=0D + returns EFI_UNSUPPORTED, then the caller is responsible for writing the= =0D + SMM Save Sate register.=0D +=0D + @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The=0D + value must be between 0 and the NumberOfCpus field = in=0D + the System Management System Table (SMST).=0D + @param[in] Register The SMM Save State register to write.=0D + @param[in] Width The number of bytes to write to the CPU save state.= =0D + @param[in] Buffer Upon entry, this holds the new CPU register value.= =0D +=0D + @retval EFI_SUCCESS The register was written to Save State.=0D + @retval EFI_INVALID_PARAMETER Buffer is NULL.=0D + @retval EFI_UNSUPPORTED This function does not support writing Reg= ister.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +SmmCpuFeaturesWriteSaveStateRegister (=0D + IN UINTN CpuIndex,=0D + IN EFI_SMM_SAVE_STATE_REGISTER Register,=0D + IN UINTN Width,=0D + IN CONST VOID *Buffer=0D + )=0D +{=0D + return EFI_UNSUPPORTED;=0D +}=0D +=0D +/**=0D + Check to see if an SMM register is supported by a specified CPU.=0D +=0D + @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort.=0D + The value must be between 0 and the NumberOfCpus fi= eld=0D + in the System Management System Table (SMST).=0D + @param[in] RegName Identifies the SMM register to check for support.=0D +=0D + @retval TRUE The SMM register specified by RegName is supported by the= CPU=0D + specified by CpuIndex.=0D + @retval FALSE The SMM register specified by RegName is not supported by= the=0D + CPU specified by CpuIndex.=0D +**/=0D +BOOLEAN=0D +EFIAPI=0D +SmmCpuFeaturesIsSmmRegisterSupported (=0D + IN UINTN CpuIndex,=0D + IN SMM_REG_NAME RegName=0D + )=0D +{=0D + if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) {=0D + return TRUE;=0D + }=0D +=0D + return FALSE;=0D +}=0D +=0D +/**=0D + This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid=0D + notification is completely processed.=0D +**/=0D +VOID=0D +EFIAPI=0D +SmmCpuFeaturesCompleteSmmReadyToLock (=0D + VOID=0D + )=0D +{=0D +}=0D diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c= b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c index 7777e52740eb..2f8841bbbf77 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c @@ -17,49 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =0D #include "CpuFeaturesLib.h"=0D =0D -/**=0D - This function updates the SMRAM save state on the currently executing CP= U=0D - to resume execution at a specific address after an RSM instruction. Thi= s=0D - function must evaluate the SMRAM save state to determine the execution m= ode=0D - the RSM instruction resumes and update the resume execution address with= =0D - either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start=0D - flag in the SMRAM save state must always be cleared. This function retu= rns=0D - the value of the instruction pointer from the SMRAM save state that was= =0D - replaced. If this function returns 0, then the SMRAM save state was not= =0D - modified.=0D -=0D - This function is called during the very first SMI on each CPU after=0D - SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de=0D - to signal that the SMBASE of each CPU has been updated before the defaul= t=0D - SMBASE address is used for the first SMI to the next CPU.=0D -=0D - @param[in] CpuIndex The index of the CPU to hook. The v= alue=0D - must be between 0 and the NumberOfCp= us=0D - field in the System Management Syste= m Table=0D - (SMST).=0D - @param[in] CpuState Pointer to SMRAM Save State Map for = the=0D - currently executing CPU.=0D - @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to=0D - 32-bit execution mode from 64-bit SM= M.=0D - @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to=0D - same execution mode as SMM.=0D -=0D - @retval 0 This function did modify the SMRAM save state.=0D - @retval > 0 The original instruction pointer value from the SMRAM save = state=0D - before it was replaced.=0D -**/=0D -UINT64=0D -EFIAPI=0D -SmmCpuFeaturesHookReturnFromSmm (=0D - IN UINTN CpuIndex,=0D - IN SMRAM_SAVE_STATE_MAP *CpuState,=0D - IN UINT64 NewInstructionPointer32,=0D - IN UINT64 NewInstructionPointer=0D - )=0D -{=0D - return 0;=0D -}=0D -=0D /**=0D Hook point in normal execution mode that allows the one CPU that was ele= cted=0D as monarch during System Management Mode initialization to perform addit= ional=0D @@ -90,103 +47,6 @@ SmmCpuFeaturesRendezvousExit ( {=0D }=0D =0D -/**=0D - Check to see if an SMM register is supported by a specified CPU.=0D -=0D - @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort.=0D - The value must be between 0 and the NumberOfCpus fi= eld=0D - in the System Management System Table (SMST).=0D - @param[in] RegName Identifies the SMM register to check for support.=0D -=0D - @retval TRUE The SMM register specified by RegName is supported by the= CPU=0D - specified by CpuIndex.=0D - @retval FALSE The SMM register specified by RegName is not supported by= the=0D - CPU specified by CpuIndex.=0D -**/=0D -BOOLEAN=0D -EFIAPI=0D -SmmCpuFeaturesIsSmmRegisterSupported (=0D - IN UINTN CpuIndex,=0D - IN SMM_REG_NAME RegName=0D - )=0D -{=0D - if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) {=0D - return TRUE;=0D - }=0D -=0D - return FALSE;=0D -}=0D -=0D -/**=0D - Read an SMM Save State register on the target processor. If this functi= on=0D - returns EFI_UNSUPPORTED, then the caller is responsible for reading the= =0D - SMM Save Sate register.=0D -=0D - @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The=0D - value must be between 0 and the NumberOfCpus field= in=0D - the System Management System Table (SMST).=0D - @param[in] Register The SMM Save State register to read.=0D - @param[in] Width The number of bytes to read from the CPU save stat= e.=0D - @param[out] Buffer Upon return, this holds the CPU register value rea= d=0D - from the save state.=0D -=0D - @retval EFI_SUCCESS The register was read from Save State.=0D - @retval EFI_INVALID_PARAMETER Buffer is NULL.=0D - @retval EFI_UNSUPPORTED This function does not support reading Reg= ister.=0D -=0D -**/=0D -EFI_STATUS=0D -EFIAPI=0D -SmmCpuFeaturesReadSaveStateRegister (=0D - IN UINTN CpuIndex,=0D - IN EFI_SMM_SAVE_STATE_REGISTER Register,=0D - IN UINTN Width,=0D - OUT VOID *Buffer=0D - )=0D -{=0D - return EFI_UNSUPPORTED;=0D -}=0D -=0D -/**=0D - Writes an SMM Save State register on the target processor. If this func= tion=0D - returns EFI_UNSUPPORTED, then the caller is responsible for writing the= =0D - SMM Save Sate register.=0D -=0D - @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The=0D - value must be between 0 and the NumberOfCpus field = in=0D - the System Management System Table (SMST).=0D - @param[in] Register The SMM Save State register to write.=0D - @param[in] Width The number of bytes to write to the CPU save state.= =0D - @param[in] Buffer Upon entry, this holds the new CPU register value.= =0D -=0D - @retval EFI_SUCCESS The register was written to Save State.=0D - @retval EFI_INVALID_PARAMETER Buffer is NULL.=0D - @retval EFI_UNSUPPORTED This function does not support writing Reg= ister.=0D -**/=0D -EFI_STATUS=0D -EFIAPI=0D -SmmCpuFeaturesWriteSaveStateRegister (=0D - IN UINTN CpuIndex,=0D - IN EFI_SMM_SAVE_STATE_REGISTER Register,=0D - IN UINTN Width,=0D - IN CONST VOID *Buffer=0D - )=0D -{=0D - return EFI_UNSUPPORTED;=0D -}=0D -=0D -/**=0D - This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid=0D - notification is completely processed.=0D -**/=0D -VOID=0D -EFIAPI=0D -SmmCpuFeaturesCompleteSmmReadyToLock (=0D - VOID=0D - )=0D -{=0D -}=0D -=0D /**=0D This API provides a method for a CPU to allocate a specific region for s= toring page tables.=0D =0D --=20 2.25.1