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charset=windows-1252; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 5/6/20 1:07 PM, Bret Barkelew via groups.io wrote: > >=20 > > Should that > > section not use the !if check and just list both .inf files > > (SecPeiCpuExceptionHandlerLib.inf and > > Xcode5SecPeiCpuExceptionHandlerLib.inf)? >=20 > Hmmm, this is a very good point; after all, the updated (=3Dreverted) > "SecPeiCpuExceptionHandlerLib.inf" instance will not build with XCODE5. > Therefore we should list both lib instance INF files under [Components], > but make "SecPeiCpuExceptionHandlerLib.inf" conditional on non-XCODE5. >=20 > >=20 > Xcode5SecPeiCpuExceptionHandlerLib.inf could be added to the ignore list= = =20 > in the CI yaml file. PR gating CI currently only uses GCC and VS2017/19= =20 > and shouldn=92t have a problem with the reverted lib. This makes=20 > Xcode5SecPeiCpuExceptionHandlerLib the exception which can be documented= = =20 > in the ignore list (why it=92s being ignored). >=20 > Thoughts? I'll give those suggestions a try and see how they work. Thanks! Tom >=20 > - Bret >=20 > *From: *Laszlo Ersek via groups.io > *Sent: *Wednesday, May 6, 2020 9:33 AM > *To: *Tom Lendacky ; devel@edk2.groups.i= o=20 > > *Cc: *Jordan Justen ; Ard Biesheuvel= =20 > ; Liming Gao=20 > ; Eric Dong ; R= ay=20 > Ni ; Brijesh Singh=20 > ; Anthony Perard=20 > ; Benjamin You=20 > ; Guo Dong ;= =20 > Julien Grall ; Maurice Ma=20 > ; Andrew Fish > *Subject: *[EXTERNAL] Re: [edk2-devel] [PATCH 4/4]=20 > UefiCpuPkg/CpuExceptionHandler: Revert binary patching in standard=20 > CpuExceptionHandlerLib >=20 > On 05/06/20 16:35, Tom Lendacky wrote: > > On 5/5/20 5:15 PM, Laszlo Ersek via groups.io wrote: > >> On 05/01/20 22:17, Lendacky, Thomas wrote: > >>> BZ: > >>>=20 > https://nam06.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fbugz= illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D2340&data=3D02%7C01%7CBret.Bar= kelew%40microsoft.com%7Ca9365fbefc53477c9e3308d7f1db4560%7C72f988bf86f141af= 91ab2d7cd011db47%7C1%7C0%7C637243796372782584&sdata=3DR%2B5IgncDzx7viv3= yIwX3MloX1QlzuUJ4bZlKnc%2B0xoI%3D&reserved=3D0=20 > > >>> > >>> > >>> Now that an XCODE5 specific CpuExceptionHandlerLib library is in pl= ace, > >>> revert the changes made to the ExceptionHandlerAsm.nasm in commit > >>> 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE= 5 > >>> tool > >>> chain") so that binary patching of flash code is not performed. > >>> > >>> Cc: Eric Dong > >>> Cc: Ray Ni > >>> Cc: Laszlo Ersek > >>> Cc: Liming Gao > >>> Signed-off-by: Tom Lendacky > >>> --- > >>> =A0 .../X64/ExceptionHandlerAsm.nasm=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0 | 25 +++++-------------- > >>> =A0 1 file changed, 6 insertions(+), 19 deletions(-) > >>> > >>> diff --git > >>> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> index 19198f273137..3814f9de3703 100644 > >>> --- > >>> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> +++ > >>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> @@ -34,7 +34,7 @@ AsmIdtVectorBegin: > >>> =A0=A0=A0=A0=A0 db=A0=A0=A0=A0=A0 0x6a=A0=A0=A0=A0=A0=A0=A0 ; push= =A0 #VectorNum > >>> =A0=A0=A0=A0=A0 db=A0=A0=A0=A0=A0 ($ - AsmIdtVectorBegin) / ((AsmId= tVectorEnd - > >>> AsmIdtVectorBegin) / 32) ; VectorNum > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> -=A0=A0=A0 mov=A0=A0=A0=A0 rax, strict qword 0 ;=A0=A0=A0 mov=A0=A0= = =A0=A0 rax, > >>> ASM_PFX(CommonInterruptEntry) > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, ASM_PFX(CommonInterruptEntry) > >>> =A0=A0=A0=A0=A0 jmp=A0=A0=A0=A0 rax > >>> =A0 %endrep > >>> =A0 AsmIdtVectorEnd: > >>> @@ -44,8 +44,7 @@ HookAfterStubHeaderBegin: > >>> =A0 @VectorNum: > >>> =A0=A0=A0=A0=A0 db=A0=A0=A0=A0=A0 0=A0=A0=A0=A0=A0=A0=A0=A0=A0 ; 0 = will be fixed > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> -=A0=A0=A0 mov=A0=A0=A0=A0 rax, strict qword 0 ;=A0=A0=A0=A0 mov=A0= = =A0=A0=A0 rax, > >>> HookAfterStubHeaderEnd > >>> -JmpAbsoluteAddress: > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, HookAfterStubHeaderEnd > >>> =A0=A0=A0=A0=A0 jmp=A0=A0=A0=A0 rax > >>> =A0 HookAfterStubHeaderEnd: > >>> =A0=A0=A0=A0=A0 mov=A0=A0=A0=A0 rax, rsp > >>> @@ -257,7 +256,8 @@ HasErrorCode: > >>> =A0=A0=A0=A0=A0 ; and make sure RSP is 16-byte aligned > >>> =A0=A0=A0=A0=A0 ; > >>> =A0=A0=A0=A0=A0 sub=A0=A0=A0=A0 rsp, 4 * 8 + 8 > >>> -=A0=A0=A0 call=A0=A0=A0 ASM_PFX(CommonExceptionHandler) > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, ASM_PFX(CommonExceptionHandler) > >>> +=A0=A0=A0 call=A0=A0=A0 rax > >>> =A0=A0=A0=A0=A0 add=A0=A0=A0=A0 rsp, 4 * 8 + 8 > >>> > >>> =A0=A0=A0=A0=A0 cli > >>> @@ -365,24 +365,11 @@ DoIret: > >>> =A0 ; comments here for definition of address map > >>> =A0 global ASM_PFX(AsmGetTemplateAddressMap) > >>> =A0 ASM_PFX(AsmGetTemplateAddressMap): > >>> -=A0=A0=A0 lea=A0=A0=A0=A0 rax, [AsmIdtVectorBegin] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, AsmIdtVectorBegin > >>> =A0=A0=A0=A0=A0 mov=A0=A0=A0=A0 qword [rcx], rax > >>> =A0=A0=A0=A0=A0 mov=A0=A0=A0=A0 qword [rcx + 0x8],=A0 (AsmIdtVector= End - > >>> AsmIdtVectorBegin) / 32 > >>> -=A0=A0=A0 lea=A0=A0=A0=A0 rax, [HookAfterStubHeaderBegin] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, HookAfterStubHeaderBegin > >>> =A0=A0=A0=A0=A0 mov=A0=A0=A0=A0 qword [rcx + 0x10], rax > >>> - > >>> -; Fix up CommonInterruptEntry address > >>> -=A0=A0=A0 lea=A0=A0=A0 rax, [ASM_PFX(CommonInterruptEntry)] > >>> -=A0=A0=A0 lea=A0=A0=A0 rcx, [AsmIdtVectorBegin] > >>> -%rep=A0 32 > >>> -=A0=A0=A0 mov=A0=A0=A0 qword [rcx + (JmpAbsoluteAddress - 8 - > >>> HookAfterStubHeaderBegin)], rax > >>> -=A0=A0=A0 add=A0=A0=A0 rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) = / 32 > >>> -%endrep > >>> -; Fix up HookAfterStubHeaderEnd > >>> -=A0=A0=A0 lea=A0=A0=A0 rax, [HookAfterStubHeaderEnd] > >>> -=A0=A0=A0 lea=A0=A0=A0 rcx, [JmpAbsoluteAddress] > >>> -=A0=A0=A0 mov=A0=A0=A0 qword [rcx - 8], rax > >>> - > >>> =A0=A0=A0=A0=A0 ret > >>> > >>> > >>>=20 > ;-----------------------------------------------------------------------= -------------- > >>> > >>> > >> > >> With this patch applied, the differences with the "original" remain: > >> > >> $ git diff 2db0ccc2d7fe^..HEAD -- \ > >> > >> UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.na= sm > >> > >>> diff --git > >>> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> index ba8993d84b0b..3814f9de3703 100644 > >>> --- > >>> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> +++ > >>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm > >>> @@ -1,12 +1,6 @@ > >>> > >>>=20 > ;-----------------------------------------------------------------------= ------- > >>> ; > >>> -; Copyright (c) 2012 - 2014, Intel Corporation. All rights > >>> reserved.
> >>> -; This program and the accompanying materials > >>> -; are licensed and made available under the terms and conditions o= f > >>> the BSD License > >>> -; which accompanies this distribution.=A0 The full text of the lic= ense > >>> may be found at > >>> -; > >>>=20 > https://nam06.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fopens= ource.org%2Flicenses%2Fbsd-license.php&data=3D02%7C01%7CBret.Barkelew%4= 0microsoft.com%7Ca9365fbefc53477c9e3308d7f1db4560%7C72f988bf86f141af91ab2d7= cd011db47%7C1%7C0%7C637243796372792580&sdata=3DCZovXRJ6HURgo6sz%2FDi55S= Uy9IsrJ2pFzcHX%2Bp%2Fv8qA%3D&reserved=3D0=20 > . > >>> > >>> -; > >>> -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" B= ASIS, > >>> -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRES= S > >>> OR IMPLIED. > >>> +; Copyright (c) 2012 - 2018, Intel Corporation. All rights > >>> reserved.
> >>> +; SPDX-License-Identifier: BSD-2-Clause-Patent > >>> =A0 ; > >>> =A0 ; Module Name: > >>> =A0 ; > >> > >> This is expected. > >> > >>> @@ -189,17 +183,19 @@ HasErrorCode: > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> =A0=A0=A0=A0=A0 sidt=A0=A0=A0 [rsp] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp + 2] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp + 8] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 bx, word [rsp] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, qword [rsp + 2] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 qword [rsp], rax > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 word [rsp + 8], bx > >>> > >>> =A0=A0=A0=A0=A0 xor=A0=A0=A0=A0 rax, rax > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> =A0=A0=A0=A0=A0 push=A0=A0=A0 rax > >>> =A0=A0=A0=A0=A0 sgdt=A0=A0=A0 [rsp] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp + 2] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp] > >>> -=A0=A0=A0 xchg=A0=A0=A0 rax, [rsp + 8] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 bx, word [rsp] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 rax, qword [rsp + 2] > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 qword [rsp], rax > >>> +=A0=A0=A0 mov=A0=A0=A0=A0 word [rsp + 8], bx > >>> > >>> =A0 ;; UINT64=A0 Ldtr, Tr; > >>> =A0=A0=A0=A0=A0 xor=A0=A0=A0=A0 rax, rax > >>> > >> > >> Also expected, from commit f4c898f2b2db > >> ("UefiCpuPkg/CpuExceptionHandlerLib: Fix split lock", 2019-09-20). > >> > >> Therefore, for this patch: > >> > >> Reviewed-by: Laszlo Ersek > >> > >> *However*, this revert must be restricted to the original > >> "SecPeiCpuExceptionHandlerLib.inf" instance, i.e. where binary patch= ing > >> is not acceptable. (Otherwise, in combination with my request (1) un= der > >> patch#1, we'd needlessly break the PEI / DXE / SMM lib instances und= er > >> XCODE5.) > >> > >> (1) Therefore, please insert a new patch between patches #1 and #2, = such > >> that the new patch flip > >> > >> - PeiCpuExceptionHandlerLib.inf > >> - DxeCpuExceptionHandlerLib.inf > >> - SmmCpuExceptionHandlerLib.inf > >> > >> to using "Xcode5ExceptionHandlerAsm.nasm". > >> > >> (If you wish, you can squash these modifications into the updated > >> patch#1, rather than inserting them as a separate patch between #1 a= nd > >> #2.) > >> > >> > >> In summary, I suggest the following end-state: > >> > >> - we should have a self-patching NASM file, and one without > >> self-patching, > >> > >> - the self-patching variant should be called > >> "Xcode5ExceptionHandlerAsm.nasm" (because the *only* reason for the > >> self-patching is xcode5), > >> > >> - we should have 5 INF files in total, > >> > >> - "PeiCpuExceptionHandlerLib.inf", "DxeCpuExceptionHandlerLib.inf", > >> "SmmCpuExceptionHandlerLib.inf" should use > >> "Xcode5ExceptionHandlerAsm.nasm" (the self-patching is harmless), > >> > >> - "SecPeiCpuExceptionHandlerLib.inf" should use > >> "ExceptionHandlerAsm.nasm" (self-patching is invalid, so don't do it= ), > >> > >> - "Xcode5SecPeiCpuExceptionHandlerLib.inf" should use > >> "Xcode5ExceptionHandlerAsm.nasm" (the self-patching is invalid, but = we > >> can't avoid it when building with XCODE5), > >> > >> - platforms should resolve the CpuExceptionHandlerLib class to > >> "Xcode5SecPeiCpuExceptionHandlerLib.inf" only for the XCODE5 toolcha= in > >> *and* for the SEC phase. > > > > Ok, I have v2 ready to go, but when I ran it through the integration > > tests using a pull request I received some errors (see > >=20 > https://nam06.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdev.= azure.com%2Ftianocore%2Fedk2-ci%2F_build%2Fresults%3FbuildId%3D6516%26view%= 3Dresults&data=3D02%7C01%7CBret.Barkelew%40microsoft.com%7Ca9365fbefc53= 477c9e3308d7f1db4560%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637243796= 372792580&sdata=3DN2aYxzfr%2BNw7hkhBTEg0C%2Fm4Hv00xXBZhSz3%2FFgiW1s%3D&= amp;reserved=3D0=20 > ). > > The error is the same in all cases and the error message is: > > > > CRITICAL - > >=20 > UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandle= rLib.inf > > not in UefiCpuPkg/UefiCpuPkg.dsc > > > > Any idea about the reason for this message? >=20 > The reason is that the CI code found a library instance (INF) in > UefiCpuPkg that cannot be built *stand-alone* (i.e. without being > consumed by a different UEFI module / INF file). >=20 > In core packages, library instances should be buildable stand-alone with > the "-m" build flag, and for that, the lib instances need to be listed > in the [Components] section. >=20 > > Is it due to the > > [Components] section of the UefiCpuPkg/UefiCpuPkg.dsc file? >=20 > Yes. >=20 > > Should that > > section not use the !if check and just list both .inf files > > (SecPeiCpuExceptionHandlerLib.inf and > > Xcode5SecPeiCpuExceptionHandlerLib.inf)? >=20 > Hmmm, this is a very good point; after all, the updated (=3Dreverted) > "SecPeiCpuExceptionHandlerLib.inf" instance will not build with XCODE5. > Therefore we should list both lib instance INF files under [Components], > but make "SecPeiCpuExceptionHandlerLib.inf" conditional on non-XCODE5. >=20 > I wonder how the CI logic will cope with this! >=20 > Thanks, > Laszlo >=20 >=20 >=20