From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.85.128.67; helo=mail-wm1-f67.google.com; envelope-from=philmd@redhat.com; receiver=edk2-devel@lists.01.org Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BFB412118F77F for ; Mon, 26 Nov 2018 10:18:07 -0800 (PST) Received: by mail-wm1-f67.google.com with SMTP id n133so2781530wmd.4 for ; Mon, 26 Nov 2018 10:18:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=tT+uShlUk9+ammXrXg27NM4ssdHTe2lwKUEa3+l9tOg=; b=amrP0q1uVhnE/9DfLnUjo19b/KmFjoZk0wQ13ZmsAv7wpJ9td7fvy1jQvyrHE2wKVJ YKYdInqIrBuu4pVep5yZL1yZQUfFKBfmlmojl7rYNqpfgJeyxna7BGyDe0TdVaSHTRYb /3ubhCNzmGIi+4FK58DWaubetdYrgWbsDt9xOnAQpNCO5ycj5IFgeXaKJhgsu5s1luaj E264mcCu/jqmPLZPnEW/peR8uywgyl+LRh7iQ+gQVnc5J/eo9TawTWNhSPfq7ppykRXv 54ms5m4Rz39FXLBaqy1KJ6aPzeqW+8WGLEsIbruZ8/6Ny4Thkzw0bgy48L2JYF4Vp56Q O9WQ== X-Gm-Message-State: AA+aEWaCg6OpSM3esbxYUSVIlOMMo8jo5WF1UJidXDRI0SbsUy0rdwRo vVgZaYHO0bfgud5Xw3MHXm5lzg== X-Google-Smtp-Source: AFSGD/UZ3NgOtJNvng3FTQxrCc/VC3tnFBRFwbBvH66YoPsyLHaT5GO3D/orhLdrV3sdOiWJCDvUtQ== X-Received: by 2002:a1c:f404:: with SMTP id z4mr3656288wma.68.1543256285692; Mon, 26 Nov 2018 10:18:05 -0800 (PST) Received: from ?IPv6:2a01:e35:8a1f:dc10:bc9e:f614:2d6b:7cc9? ([2a01:e35:8a1f:dc10:bc9e:f614:2d6b:7cc9]) by smtp.gmail.com with ESMTPSA id a62sm689712wmf.47.2018.11.26.10.17.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Nov 2018 10:17:56 -0800 (PST) To: Ard Biesheuvel , "edk2-devel@lists.01.org" Cc: Laszlo Ersek , Leif Lindholm , Auger Eric , Andrew Jones , Julien Grall References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> <20181123121431.22353-2-ard.biesheuvel@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: <528ce146-74cd-59dd-4261-a53a8284830c@redhat.com> Date: Mon, 26 Nov 2018 19:17:51 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 In-Reply-To: Subject: Re: [PATCH 1/5] ArmPkg/ArmLib: add support for reading the max physical address space size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Nov 2018 18:18:09 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit On 26/11/18 12:46, Ard Biesheuvel wrote: > On Fri, 23 Nov 2018 at 13:14, Ard Biesheuvel wrote: >> >> Add a helper function that returns the maximum physical address space >> size as supported by the current CPU. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel >> --- >> ArmPkg/Include/Library/ArmLib.h | 6 ++++++ >> ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 16 ++++++++++++++++ >> ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++++++++ >> 3 files changed, 30 insertions(+) >> >> diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h >> index ffda50e9d767..9a804c15fdb6 100644 >> --- a/ArmPkg/Include/Library/ArmLib.h >> +++ b/ArmPkg/Include/Library/ArmLib.h >> @@ -733,4 +733,10 @@ ArmWriteCntvOff ( >> UINT64 Val >> ); >> >> +UINTN >> +EFIAPI >> +ArmGetPhysicalAddressBits ( >> + VOID >> + ); >> + >> #endif // __ARM_LIB__ >> diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S >> index 1ef2f61f5979..75ab8dade485 100644 >> --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S >> +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S >> @@ -196,4 +196,20 @@ ASM_FUNC(ArmWriteSctlr) >> 3:msr sctlr_el3, x0 >> 4:ret >> >> +ASM_FUNC(ArmGetPhysicalAddressBits) >> + mrs x0, id_aa64mmfr0_el1 >> + adr x1, .LPARanges >> + and x0, x0, #7 >> + ldrb w0, [x1, x0] >> + ret >> + >> +// >> +// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the >> +// physical address space support on this CPU: >> +// 0 == 32 bits, 1 == 36 bits, etc etc >> +// 6 and 7 are reserved >> +// >> +.LPARanges: >> + .byte 32, 36, 40, 42, 44, 48, -1, -1 >> + > > Note: as Drew pointed out, we want 52 bits included as well in this > enumeration. I will fix that up when applying (unless anyone objects) Using index 6 == 52 and updating the comment: Reviewed-by: Philippe Mathieu-Daudé > >> ASM_FUNCTION_REMOVE_IF_UNREFERENCED >> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S >> index f2a517671f0a..f2f3c9a25991 100644 >> --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S >> +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S >> @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr) >> isb >> bx lr >> >> +ASM_FUNC (ArmGetPhysicalAddressBits) >> + mrc p15, 0, r0, c0, c1, 4 // MMFR0 >> + and r0, r0, #0xf // VMSA [3:0] >> + cmp r0, #5 // >5 implies LPAE support >> + movlt r0, #32 // 32 bits if no LPAE >> + movge r0, #40 // 40 bits if LPAE >> + bx lr >> + >> ASM_FUNCTION_REMOVE_IF_UNREFERENCED >> -- >> 2.17.1 >>