From: Laszlo Ersek <lersek@redhat.com>
To: "Ni, Ruiyu" <ruiyu.ni@Intel.com>, Eric Dong <eric.dong@intel.com>,
edk2-devel@lists.01.org
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Subject: Re: [Patch v2 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.
Date: Fri, 21 Sep 2018 11:41:52 +0200 [thread overview]
Message-ID: <53768691-df03-b8d8-66c1-938a37fe3d77@redhat.com> (raw)
In-Reply-To: <e7850256-55be-a247-a3de-a1b902a5c0b6@Intel.com>
On 09/21/18 10:44, Ni, Ruiyu wrote:
> On 9/21/2018 3:41 PM, Eric Dong wrote:
>> UINT32 User:1;
>> - UINT32 Reserved1:2;
>> + ///
>> + /// [Bit 4] PwrEvtEn.
>> + ///
>> + UINT32 PwrEvtEn:1;
>> + ///
>> + /// [Bit 5] FUPonPTW.
>> + ///
>> + UINT32 FUPonPTW:1;
>> ///
>> /// [Bit 6] FabricEn. If (CPUID.(EAX=07H, ECX=0):ECX[3] = 1).
>> ///
>> @@ -4672,7 +4679,10 @@ typedef union {
>> /// [Bit 11] DisRETC.
>> ///
>> UINT32 DisRETC:1;
>> - UINT32 Reserved2:1;
>> + ///
>> + /// [Bit 12] PTWEn.
>> + ///
>> + UINT32 PTWEn:1;
>> ///
>> /// [Bit 13] BranchEn.
>> ///
>> @@ -4681,17 +4691,17 @@ typedef union {
>> /// [Bits 17:14] MTCFreq. If (CPUID.(EAX=07H, ECX=0):EBX[3] = 1).
>> ///
>> UINT32 MTCFreq:4;
>> - UINT32 Reserved3:1;
>> + UINT32 Reserved7:1;
>
> I prefer to not change this field name since the bit range for this
> Reserved6 is not changed.
>
>> ///
>> /// [Bits 22:19] CYCThresh. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
>> ///
>> UINT32 CYCThresh:4;
>> - UINT32 Reserved4:1;
>> + UINT32 Reserved8:1;
>
> I prefer to not change this field name since the bit range for this
> Reserved6 is not changed.
>
>> ///
>> /// [Bits 27:24] PSBFreq. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
>> ///
>> UINT32 PSBFreq:4;
>> - UINT32 Reserved5:4;
>> + UINT32 Reserved9:4;
>
> I prefer to not change this field name since the bit range for this
> Reserved6 is not changed.
>
>> ///
>> /// [Bits 35:32] ADDR0_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0]
>> > 0).
>> ///
>> @@ -4708,7 +4718,7 @@ typedef union {
>> /// [Bits 47:44] ADDR3_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0]
>> > 3).
>> ///
>> UINT32 ADDR3_CFG:4;
>> - UINT32 Reserved6:16;
>> + UINT32 Reserved10:16;
>
> I prefer to not change this field name since the bit range for this
> Reserved6 is not changed.
>
>> } Bits;
>
>
> Eric,
> As comments above, I suggest we keep the original Reserved## name if the
> bit range for that field doesn't change. We can only update the
> Reserved## name if the bit range changes.
>
> In this way, we can maximally avoid build failure and also avoid silent
> failure.
>
> In general, the Reserved## name is updated when the bit range changes.
> The ## is updated to
> 1 + MAX (all numbers used by Reserved## in this structure).
>
>
> Laszlo,
> What's your opinion?
>
I agree with your suggestion.
Thanks
Laszlo
next prev parent reply other threads:[~2018-09-21 9:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 7:41 [Patch v2 00/14] Update MSR definitions Eric Dong
2018-09-21 7:41 ` [Patch v2 01/14] UefiCpuPkg/Include/Register/Msr: Update reference spec info Eric Dong
2018-09-21 7:41 ` [Patch v2 02/14] UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture Eric Dong
2018-09-21 7:41 ` [Patch v2 03/14] UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR Eric Dong
2018-09-21 7:41 ` [Patch v2 04/14] UefiCpuPkg/Include/Register/Msr/*.h: " Eric Dong
2018-09-21 7:41 ` [Patch v2 05/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: " Eric Dong
2018-09-21 7:41 ` [Patch v2 06/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs Eric Dong
2018-09-21 7:41 ` [Patch v2 07/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR Eric Dong
2018-09-21 7:41 ` [Patch v2 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition Eric Dong
2018-09-21 8:44 ` Ni, Ruiyu
2018-09-21 9:41 ` Laszlo Ersek [this message]
2018-09-25 2:08 ` Dong, Eric
2018-09-21 7:41 ` [Patch v2 09/14] UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR Eric Dong
2018-09-21 7:41 ` [Patch v2 10/14] UefiCpuPkg/Include/Register/Msr/P6Msr.h: " Eric Dong
2018-09-21 7:41 ` [Patch v2 11/14] UefiCpuPkg/Include/Register/Msr/CoreMsr.h: " Eric Dong
2018-09-21 7:41 ` [Patch v2 12/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one Eric Dong
2018-09-21 7:41 ` [Patch v2 13/14] UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: " Eric Dong
2018-09-21 7:41 ` [Patch v2 14/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition Eric Dong
2018-09-21 8:46 ` Ni, Ruiyu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53768691-df03-b8d8-66c1-938a37fe3d77@redhat.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox