From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F40D91A1DEF for ; Thu, 27 Oct 2016 21:43:20 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 27 Oct 2016 21:43:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,407,1473145200"; d="scan'208";a="894959144" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 27 Oct 2016 21:43:20 -0700 Received: from FMSMSX109.amr.corp.intel.com (10.18.116.9) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 27 Oct 2016 21:43:19 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx109.amr.corp.intel.com (10.18.116.9) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 27 Oct 2016 21:43:18 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.206]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.209]) with mapi id 14.03.0248.002; Fri, 28 Oct 2016 12:43:17 +0800 From: "Fan, Jeff" To: "Duran, Leo" , "Kinney, Michael D" , "edk2-devel@lists.01.org" CC: "Gao, Liming" Thread-Topic: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to SmmCpuFeaturesLib library. Thread-Index: AQHSMKHDvUDyQxwKqU2WAi/q7wPTCKC8aK2AgACdj/CAAANXQP//o0SAgACIe2A= Date: Fri, 28 Oct 2016 04:43:16 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4A2B9645@shsmsx102.ccr.corp.intel.com> References: <1477607390-8225-1-git-send-email-leo.duran@amd.com> <1477607390-8225-2-git-send-email-leo.duran@amd.com> <542CF652F8836A4AB8DBFAAD40ED192A4A2B909A@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiN2E4YmQ0YzAtNjA3MC00MzhjLWE4MzUtYTM5OGZlZDczYWJiIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6Ik5jaytra2g4dm1OQUdZOXY5aEt0bE1NUWNHenRWWFwvQndvVnNXTGpRYVlFPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg: Move GetProcessorLocation() to SmmCpuFeaturesLib library. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Oct 2016 04:43:21 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Leo, Got it. Could you please create the patch to add GetProcessorLocation() in = Local APIC Lib? There are two library instances required to be updated UefiCpuPkg\Library\BaseXApicLib UefiCpuPkg\Library\BaseXApicX2ApicLib Then you could remove the ExtractProcessorLocation() from PiSmmCpuDxeSmm. Thanks! Jeff -----Original Message----- From: Duran, Leo [mailto:leo.duran@amd.com]=20 Sent: Friday, October 28, 2016 11:20 AM To: Fan, Jeff; Kinney, Michael D; edk2-devel@lists.01.org Cc: Gao, Liming Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to SmmC= puFeaturesLib library. Please see my reply below. Thanks, Leo > -----Original Message----- > From: Fan, Jeff [mailto:jeff.fan@intel.com] > Sent: Thursday, October 27, 2016 8:00 PM > To: Kinney, Michael D ; Duran, Leo=20 > ; edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to=20 > SmmCpuFeaturesLib library. >=20 > Because the CPU location information are gotten from Initial APIC ID, =20 > it makes more sense to be added into Local APIC Lib. >=20 > The following is my proposal on its definition. > /** > Get CPU Package/Core/Thread location information. >=20 > @param[in] InitialApicId CPU APIC ID > @param[out] Package Pointer to Package ID > @param[out] Core Pointer to Core ID > @param[out] Thread Pointer to Thread ID > **/ > VOID > ExtractProcessorLocation ( > IN UINT32 InitialApicId, > OUT UINT32 *Package, > OUT UINT32 *Core, > OUT UINT32 *Thread > ); >=20 > Leo, is it OK to meet your requirement? >=20 > Thanks! > Jeff [Duran, Leo] Sure thing. The main point is to get the vendor-specific CPUID code out of the driver, = and into a library. >=20 > -----Original Message----- > From: Fan, Jeff > Sent: Friday, October 28, 2016 8:45 AM > To: Kinney, Michael D; Leo Duran; edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to=20 > SmmCpuFeaturesLib library. >=20 > Leo and Mike, >=20 > GetProcessorLocation() are not only used by PiSmmCpuDxeSmm driver, it=20 > is also duplicated in UefiCpuPkg\Library\MpInitLib\MpLib.c. >=20 > I suggest that we could add this API into=20 > UefiCpuPkg/Include/UefiCpuLib or UefiCpuPkg/Include/ LocalApicLib.h. > Thus, it could be consumed by modules across PEI/DXE/SMM modules. >=20 > Thanks! > Jeff >=20 > -----Original Message----- > From: Kinney, Michael D > Sent: Friday, October 28, 2016 7:16 AM > To: Leo Duran; edk2-devel@lists.01.org; Kinney, Michael D > Cc: Gao, Liming; Fan, Jeff > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to=20 > SmmCpuFeaturesLib library. >=20 > Leo, >=20 > This looks like a good proposed change to the SmmFeaturesLib and=20 > PiSmmCpuDxeSmm module. >=20 > Adding UefiCpuPkg maintainer Jeff Fan to the Cc list. >=20 > There are 3 implementations of the SmmFeaturesLib in edk2/master. > This patch needs to update all 3, or some of the platforms in=20 > edk2/master will no longer build: >=20 > * OvmfPkg\Library\SmmCpuFeaturesLib > * QuarkSocPkg\QuarkNorthCluster\Library\SmmCpuFeaturesLib > * UefiCpuPkg\Library\SmmCpuFeaturesLib >=20 > Thanks, >=20 > Mike >=20 > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf=20 > > Of Leo Duran > > Sent: Thursday, October 27, 2016 3:30 PM > > To: edk2-devel@lists.01.org > > Cc: Leo Duran ; Gao, Liming > > > Subject: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to=20 > > SmmCpuFeaturesLib library. > > > > 1) Remove SmmGetProcessorLocation() from PiSmmCpuDxeSmm driver > > 2) Add SmmCpuFeaturesGetProcessorLocation() to SmmCpuFeaturesLib=20 > > library > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Leo Duran > > --- > > UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h | 17 +++ > > .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 118 > ++++++++++++++++++++ > > UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c | 121 +------------= ------ > -- > > 3 files changed, 136 insertions(+), 120 deletions(-) > > > > diff --git a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > index 4478003..dd14ec5 100644 > > --- a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > +++ b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > @@ -398,4 +398,21 @@ SmmCpuFeaturesAllocatePageTableMemory ( > > IN UINTN Pages > > ); > > > > +/** > > + Get Package ID/Core ID/Thread ID of a processor. > > + > > + APIC ID must be an initial APIC ID. > > + > > + The algorithm assumes the target system has symmetry across=20 > > + physical package > > boundaries > > + with respect to the number of logical processors per package,=20 > > + number of cores per > > package. > > + > > + @param ApicId APIC ID of the target logical processor. > > + @param Location Returns the processor location information. > > +**/ > > +VOID > > +SmmCpuFeaturesGetProcessorLocation ( > > + IN UINT32 ApicId, > > + OUT EFI_CPU_PHYSICAL_LOCATION *Location > > + ); > > + > > #endif > > diff --git=20 > > a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > index 1754f2d..1e300f3 100644 > > --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > @@ -673,3 +673,121 @@ SmmCpuFeaturesAllocatePageTableMemory ( > > return NULL; > > } > > > > +/** > > + Get Package ID/Core ID/Thread ID of a processor. > > + > > + APIC ID must be an initial APIC ID. > > + > > + The algorithm below assumes the target system has symmetry across=20 > > + physical package > > boundaries > > + with respect to the number of logical processors per package,=20 > > + number of cores per > > package. > > + > > + @param ApicId APIC ID of the target logical processor. > > + @param Location Returns the processor location information. > > +**/ > > +VOID > > +SmmCpuFeaturesGetProcessorLocation ( > > + IN UINT32 ApicId, > > + OUT EFI_CPU_PHYSICAL_LOCATION *Location > > + ) > > +{ > > + UINTN ThreadBits; > > + UINTN CoreBits; > > + UINT32 RegEax; > > + UINT32 RegEbx; > > + UINT32 RegEcx; > > + UINT32 RegEdx; > > + UINT32 MaxCpuIdIndex; > > + UINT32 SubIndex; > > + UINTN LevelType; > > + UINT32 MaxLogicProcessorsPerPackage; > > + UINT32 MaxCoresPerPackage; > > + BOOLEAN TopologyLeafSupported; > > + > > + ASSERT (Location !=3D NULL); > > + > > + ThreadBits =3D 0; > > + CoreBits =3D 0; > > + TopologyLeafSupported =3D FALSE; > > + > > + // > > + // Check if the processor is capable of supporting more than one=20 > > + logical > processor. > > + // > > + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx); > ASSERT > > + ((RegEdx & BIT28) !=3D 0); > > + > > + // > > + // Assume three-level mapping of APIC ID: Package:Core:SMT. > > + // > > + > > + // > > + // Get the max index of basic CPUID // AsmCpuid=20 > > + (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL); > > + > > + // > > + // If the extended topology enumeration leaf is available, it //=20 > > + is the preferred mechanism for enumerating topology. > > + // > > + if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { > > + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, > &RegEcx, NULL); > > + // > > + // If CPUID.(EAX=3D0BH, ECX=3D0H):EBX returns zero and maximum=20 > > + input > value for > > + // basic CPUID information is greater than 0BH, then CPUID.0BH=20 > > + leaf is > not > > + // supported on that processor. > > + // > > + if ((RegEbx & 0xffff) !=3D 0) { > > + TopologyLeafSupported =3D TRUE; > > + > > + // > > + // Sub-leaf index 0 (ECX=3D 0 as input) provides enumeration=20 > > + parameters > to extract > > + // the SMT sub-field of x2APIC ID. > > + // > > + LevelType =3D (RegEcx >> 8) & 0xff; > > + ASSERT (LevelType =3D=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT); > > + if ((RegEbx & 0xffff) > 1 ) { > > + ThreadBits =3D RegEax & 0x1f; > > + } else { > > + // > > + // HT is not supported > > + // > > + ThreadBits =3D 0; > > + } > > + > > + // > > + // Software must not assume any "level type" encoding > > + // value to be related to any sub-leaf index, except sub-leaf 0. > > + // > > + SubIndex =3D 1; > > + do { > > + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, > NULL, &RegEcx, NULL); > > + LevelType =3D (RegEcx >> 8) & 0xff; > > + if (LevelType =3D=3D CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) = { > > + CoreBits =3D (RegEax & 0x1f) - ThreadBits; > > + break; > > + } > > + SubIndex++; > > + } while (LevelType !=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID); > > + } > > + } > > + > > + if (!TopologyLeafSupported) { > > + AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL); > > + MaxLogicProcessorsPerPackage =3D (RegEbx >> 16) & 0xff; > > + if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { > > + AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, > NULL); > > + MaxCoresPerPackage =3D (RegEax >> 26) + 1; > > + } else { > > + // > > + // Must be a single-core processor. > > + // > > + MaxCoresPerPackage =3D 1; > > + } > > + > > + ThreadBits =3D (UINTN) (HighBitSet32=20 > > + (MaxLogicProcessorsPerPackage / > > MaxCoresPerPackage - 1) + 1); > > + CoreBits =3D (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);= =20 > > + } > > + > > + Location->Thread =3D ApicId & ~((-1) << ThreadBits); =20 > > + Location->Core =3D (ApicId >> ThreadBits) & ~((-1) << CoreBits); =20 > > + Location->Package =3D (ApicId >> (ThreadBits+ CoreBits)); } > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > index 40f2a17..2bfb1e8 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > @@ -27,125 +27,6 @@ EFI_SMM_CPU_SERVICE_PROTOCOL > mSmmCpuService =3D { > > }; > > > > /** > > - Get Package ID/Core ID/Thread ID of a processor. > > - > > - APIC ID must be an initial APIC ID. > > - > > - The algorithm below assumes the target system has symmetry across=20 > > physical package boundaries > > - with respect to the number of logical processors per package,=20 > > number of cores per package. > > - > > - @param ApicId APIC ID of the target logical processor. > > - @param Location Returns the processor location information. > > -**/ > > -VOID > > -SmmGetProcessorLocation ( > > - IN UINT32 ApicId, > > - OUT EFI_CPU_PHYSICAL_LOCATION *Location > > - ) > > -{ > > - UINTN ThreadBits; > > - UINTN CoreBits; > > - UINT32 RegEax; > > - UINT32 RegEbx; > > - UINT32 RegEcx; > > - UINT32 RegEdx; > > - UINT32 MaxCpuIdIndex; > > - UINT32 SubIndex; > > - UINTN LevelType; > > - UINT32 MaxLogicProcessorsPerPackage; > > - UINT32 MaxCoresPerPackage; > > - BOOLEAN TopologyLeafSupported; > > - > > - ASSERT (Location !=3D NULL); > > - > > - ThreadBits =3D 0; > > - CoreBits =3D 0; > > - TopologyLeafSupported =3D FALSE; > > - > > - // > > - // Check if the processor is capable of supporting more than one=20 > > logical > processor. > > - // > > - AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx); > > - ASSERT ((RegEdx & BIT28) !=3D 0); > > - > > - // > > - // Assume three-level mapping of APIC ID: Package:Core:SMT. > > - // > > - > > - // > > - // Get the max index of basic CPUID > > - // > > - AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL); > > - > > - // > > - // If the extended topology enumeration leaf is available, it > > - // is the preferred mechanism for enumerating topology. > > - // > > - if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { > > - AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, > &RegEcx, NULL); > > - // > > - // If CPUID.(EAX=3D0BH, ECX=3D0H):EBX returns zero and maximum inp= ut > value for > > - // basic CPUID information is greater than 0BH, then CPUID.0BH lea= f is > not > > - // supported on that processor. > > - // > > - if ((RegEbx & 0xffff) !=3D 0) { > > - TopologyLeafSupported =3D TRUE; > > - > > - // > > - // Sub-leaf index 0 (ECX=3D 0 as input) provides enumeration par= ameters > to extract > > - // the SMT sub-field of x2APIC ID. > > - // > > - LevelType =3D (RegEcx >> 8) & 0xff; > > - ASSERT (LevelType =3D=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT); > > - if ((RegEbx & 0xffff) > 1 ) { > > - ThreadBits =3D RegEax & 0x1f; > > - } else { > > - // > > - // HT is not supported > > - // > > - ThreadBits =3D 0; > > - } > > - > > - // > > - // Software must not assume any "level type" encoding > > - // value to be related to any sub-leaf index, except sub-leaf 0. > > - // > > - SubIndex =3D 1; > > - do { > > - AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, > NULL, &RegEcx, NULL); > > - LevelType =3D (RegEcx >> 8) & 0xff; > > - if (LevelType =3D=3D CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) = { > > - CoreBits =3D (RegEax & 0x1f) - ThreadBits; > > - break; > > - } > > - SubIndex++; > > - } while (LevelType !=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID); > > - } > > - } > > - > > - if (!TopologyLeafSupported) { > > - AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL); > > - MaxLogicProcessorsPerPackage =3D (RegEbx >> 16) & 0xff; > > - if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { > > - AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, NULL); > > - MaxCoresPerPackage =3D (RegEax >> 26) + 1; > > - } else { > > - // > > - // Must be a single-core processor. > > - // > > - MaxCoresPerPackage =3D 1; > > - } > > - > > - ThreadBits =3D (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage= / > > MaxCoresPerPackage - 1) + 1); > > - CoreBits =3D (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1); > > - } > > - > > - Location->Thread =3D ApicId & ~((-1) << ThreadBits); > > - Location->Core =3D (ApicId >> ThreadBits) & ~((-1) << CoreBits); > > - Location->Package =3D (ApicId >> (ThreadBits+ CoreBits)); -} > > - > > -/** > > Gets processor information on the requested processor at the=20 > > instant this call is made. > > > > @param[in] This A pointer to the > EFI_SMM_CPU_SERVICE_PROTOCOL > > instance. > > @@ -280,7 +161,7 @@ SmmAddProcessor ( > > gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId =3D=3D > INVALID_APIC_ID) { > > gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId =3D ProcessorId= ; > > gSmmCpuPrivate->ProcessorInfo[Index].StatusFlag =3D 0; > > - SmmGetProcessorLocation ((UINT32)ProcessorId, &gSmmCpuPrivate- > > >ProcessorInfo[Index].Location); > > + SmmCpuFeaturesGetProcessorLocation ((UINT32)ProcessorId, > > + &gSmmCpuPrivate- > > >ProcessorInfo[Index].Location); > > > > *ProcessorNumber =3D Index; > > gSmmCpuPrivate->Operation[Index] =3D SmmCpuAdd; > > -- > > 1.9.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel