From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6CE5781D38 for ; Wed, 30 Nov 2016 20:58:24 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 30 Nov 2016 20:58:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,723,1477983600"; d="scan'208";a="1075930173" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga001.fm.intel.com with ESMTP; 30 Nov 2016 20:58:23 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 30 Nov 2016 20:58:23 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.239]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.142]) with mapi id 14.03.0248.002; Thu, 1 Dec 2016 12:58:21 +0800 From: "Fan, Jeff" To: "Kinney, Michael D" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Tian, Feng" Thread-Topic: [Patch 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Reduce use of PSD Thread-Index: AQHSSthhTr6FDcMUCkGnbBZLjX41o6DyiS0g Date: Thu, 1 Dec 2016 04:58:21 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4A2ED392@shsmsx102.ccr.corp.intel.com> References: <1480489617-17028-1-git-send-email-michael.d.kinney@intel.com> In-Reply-To: <1480489617-17028-1-git-send-email-michael.d.kinney@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWUyODhhYTAtMmYxYy00MmJmLWE3NDgtMGUyZmFkMTI4NTEzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6Im9kN3c0YzZOcWh1OUtBaXVIdzVTUUluOXpNalwvdyt1Wlo2REZGcVRzSUNFPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Reduce use of PSD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Dec 2016 04:58:24 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jeff Fan on serials. -----Original Message----- From: Kinney, Michael D=20 Sent: Wednesday, November 30, 2016 3:07 PM To: edk2-devel@lists.01.org Cc: Yao, Jiewen; Fan, Jeff; Tian, Feng Subject: [Patch 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Reduce use of PSD https://bugzilla.tianocore.org/show_bug.cgi?id=3D277 Remove MtrrBaseMaskPtr field from PSD and move MTRR to a global variable si= nce all CPUs use the same MTRR settings. Reduce use of PSD to allow alternate SmmCpuFeaturesLib implementations to u= se their own PSD layouts. Cc: Jiewen Yao Cc: Jeff Fan Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney Michael Kinney (2): UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRRs from PSD structure UefiCpuPkg/PiSmmCpuDxeSmm: Remove PSD layout assumptions UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 3 ++ UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 3 ++ UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 3 ++ UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 33 ++++-------------- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 15 ++++---- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 26 -------------- UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 2 +- UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 40 ++++++++++++++++++= +++- 8 files changed, 64 insertions(+), 61 deletions(-) -- 2.6.3.windows.1