From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9EAFF81FCE for ; Mon, 5 Dec 2016 21:20:13 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 05 Dec 2016 21:20:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,751,1477983600"; d="scan'208";a="794685394" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by FMSMGA003.fm.intel.com with ESMTP; 05 Dec 2016 21:20:13 -0800 Received: from fmsmsx121.amr.corp.intel.com (10.18.125.36) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 5 Dec 2016 21:20:12 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx121.amr.corp.intel.com (10.18.125.36) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 5 Dec 2016 21:20:12 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.239]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.116]) with mapi id 14.03.0248.002; Tue, 6 Dec 2016 13:20:09 +0800 From: "Fan, Jeff" To: "Kinney, Michael D" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Tian, Feng" Thread-Topic: [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD Thread-Index: AQHST3sDyHehw1fCvEy8xuXQOIrP1KD6YdpQ Date: Tue, 6 Dec 2016 05:20:09 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4A2F4546@shsmsx102.ccr.corp.intel.com> References: <1480999280-30356-1-git-send-email-michael.d.kinney@intel.com> In-Reply-To: <1480999280-30356-1-git-send-email-michael.d.kinney@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNmNhMzM2NjctOWRkOC00Zjg3LTg5NGItNjUyZmEzM2VjNWU2IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InByUFRZRWxZdHhkTnlrOUtja1wvbUxETE1jTHFoR2ZUM1RrcUlsN3hNcTJzPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Dec 2016 05:20:13 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jeff Fan -----Original Message----- From: Kinney, Michael D=20 Sent: Tuesday, December 06, 2016 12:41 PM To: edk2-devel@lists.01.org Cc: Yao, Jiewen; Fan, Jeff; Tian, Feng Subject: [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD https://bugzilla.tianocore.org/show_bug.cgi?id=3D277 The MTRR field was removed from PROCESS_SMM_DESCRIPTOR structure in commit: https://github.com/tianocore/edk2/commit/26ab5ac3621bdefe96987f8c1512ca79e1= bb7ac0 However, the references to the MTRR field in assembly files were not remove= d. Remove the extern reference to gSmiMtrr and set the Reserved14 field of= PROCESS_SMM_DESCRIPTOR to 0. Cc: Jiewen Yao Cc: Jeff Fan Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S | 3 +-- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm | 3 +-- UefiCpuPkg/PiSmm= CpuDxeSmm/Ia32/SmiException.nasm | 3 +-- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S | 3 +-- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm | 3 +-- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm | 3 +-- 6 files changed, 6 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S b/UefiCpuPkg/PiS= mmCpuDxeSmm/Ia32/SmiException.S index cf5ef82..4600c7c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S @@ -21,7 +21,6 @@ =20 ASM_GLOBAL ASM_PFX(SmiPFHandler) ASM_GLOBAL ASM_PFX(PageFaultStubFunction) -ASM_GLOBAL ASM_PFX(gSmiMtrrs)= ASM_GLOBAL ASM_PFX(gcSmiIdtr) ASM_GLOBAL ASM_PFX(gcSmiGdtr) ASM_GLOBA= L ASM_PFX(gTaskGateDescriptor) @@ -230,7 +229,7 @@ ASM_PFX(gcPsd): .long GDT_SIZE .long 0 .space 24, 0 - .long ASM_PFX(gSmiMtrrs) + .long 0 .long 0 .equ PSD_SIZE, . - ASM_PFX(gcPsd) =20 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm b/UefiCpuPkg/P= iSmmCpuDxeSmm/Ia32/SmiException.asm index 7b162f8..80a44b8 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm @@ -23,7 +23,6 @@ =20 EXTERNDEF SmiPFHandler:PROC EXTERNDEF PageFaultStubFunction:PROC -EXTERNDEF gSmiMtrrs:QWORD EXTERNDEF gcSmiIdtr:FWORD EXTERNDEF gcSmiGdtr:FWORD EXTERNDEF gTaskGateDescriptor:QWORD @@ -245,7 +244,7 @@ gcPsd LABEL BYTE DD GDT_SIZE DD 0 DB 24 dup (0) - DQ offset gSmiMtrrs + DQ 0 PSD_SIZE =3D $ - offset gcPsd =20 gcSmiGdtr LABEL FWORD diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm b/UefiCpuPkg/= PiSmmCpuDxeSmm/Ia32/SmiException.nasm index 4d58999..7c80a6a 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm @@ -19,7 +19,6 @@ ;-------------------------------------------------------------------------= ------ =20 extern ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable)) -extern ASM_PFX(g= SmiMtrrs) extern ASM_PFX(SmiPFHandler) =20 global ASM_PFX(gcSmiIdtr) @@ -243,7 +242,7 @@ ASM_PFX(gcPsd): DD 0 times 24 DB 0 DD 0 - DD ASM_PFX(gSmiMtrrs) + DD 0 PSD_SIZE equ $ - ASM_PFX(gcPsd) =20 ASM_PFX(gcSmiGdtr): diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S b/UefiCpuPkg/PiSm= mCpuDxeSmm/X64/SmiException.S index 2e2792d..338bb70 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S @@ -20,7 +20,6 @@ #-------------------------------------------------------------------------= ----- =20 ASM_GLOBAL ASM_PFX(SmiPFHandler) -ASM_GLOBAL ASM_PFX(gSmiMtrrs) ASM_GLOBAL ASM_PFX(gcSmiIdtr) ASM_GLOBAL ASM_PFX(gcSmiGdtr) ASM_GLOBAL ASM_PFX(gcPsd) @@ -113,7 +112,7 @@ ASM_PFX(gcPsd): .long GDT_SIZE .long 0 .space 24, 0 - .quad ASM_PFX(gSmiMtrrs) + .quad 0 .equ PSD_SIZE, . - ASM_PFX(gcPsd) =20 # diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm b/UefiCpuPkg/Pi= SmmCpuDxeSmm/X64/SmiException.asm index f55ba72..80bd739 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm @@ -19,7 +19,6 @@ ;-------------------------------------------------------------------------= ------ =20 EXTERNDEF SmiPFHandler:PROC -EXTERNDEF gSmiMtrrs:QWORD EXTERNDEF gcSmiIdtr:FWORD EXTERNDEF gcSmiGdtr:FWORD EXTERNDEF gcPsd:BYTE @@ -129,7 +128,7 @@ gcPsd LABEL BYTE DD GDT_SIZE DD 0 DB 24 dup (0) - DQ offset gSmiMtrrs + DQ 0 PSD_SIZE =3D $ - offset gcPsd =20 ; diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm b/UefiCpuPkg/P= iSmmCpuDxeSmm/X64/SmiException.nasm index bc8d95d..b2e2e6d 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm @@ -19,7 +19,6 @@ ;-------------------------------------------------------------------------= ------ =20 extern ASM_PFX(SmiPFHandler) -extern ASM_PFX(gSmiMtrrs) =20 global ASM_PFX(gcSmiIdtr) global ASM_PFX(gcSmiGdtr) @@ -130,7 +129,7 @@ ASM_PFX(gcPsd): DD GDT_SIZE DD 0 times 24 DB 0 - DQ ASM_PFX(gSmiMtrrs) + DQ 0 PSD_SIZE equ $ - ASM_PFX(gcPsd) =20 ; -- 2.6.3.windows.1