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* [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
@ 2016-12-20  1:47 Hao Wu
  2016-12-20  1:48 ` Fan, Jeff
  2016-12-20  1:51 ` Kinney, Michael D
  0 siblings, 2 replies; 3+ messages in thread
From: Hao Wu @ 2016-12-20  1:47 UTC (permalink / raw)
  To: edk2-devel; +Cc: Hao Wu, Jeff Fan, Michael Kinney

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=UTF-8, Size: 1157 bytes --]

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index 633e54d..4f9c103 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -4014,7 +4014,7 @@ typedef union {
     /// [Bit 14] If read as 1, Intel(R) Processor Trace (Intel PT) can be used
     /// in VMX operation. If the processor supports Intel PT but does not allow
     /// it to be used in VMX operation, execution of VMXON clears
-    /// IA32_RTIT_CTL.TraceEn (see “VMXON—Enter VMX Operation” in Chapter 30);
+    /// IA32_RTIT_CTL.TraceEn (see "VMXON-Enter VMX Operation" in Chapter 30);
     /// any attempt to set that bit while in VMX operation (including VMX root
     /// operation) using the WRMSR instruction causes a general-protection
     /// exception.
-- 
1.9.5.msysgit.0



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
  2016-12-20  1:47 [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters Hao Wu
@ 2016-12-20  1:48 ` Fan, Jeff
  2016-12-20  1:51 ` Kinney, Michael D
  1 sibling, 0 replies; 3+ messages in thread
From: Fan, Jeff @ 2016-12-20  1:48 UTC (permalink / raw)
  To: Wu, Hao A, edk2-devel@lists.01.org; +Cc: Kinney, Michael D

Reviewed-by: Jeff Fan <jeff.fan@intel.com> 

Please go ahead to commit this minor updating.

-----Original Message-----
From: Wu, Hao A 
Sent: Tuesday, December 20, 2016 9:48 AM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A; Fan, Jeff; Kinney, Michael D
Subject: [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index 633e54d..4f9c103 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -4014,7 +4014,7 @@ typedef union {
     /// [Bit 14] If read as 1, Intel(R) Processor Trace (Intel PT) can be used
     /// in VMX operation. If the processor supports Intel PT but does not allow
     /// it to be used in VMX operation, execution of VMXON clears
-    /// IA32_RTIT_CTL.TraceEn (see �VMXON�Enter VMX Operation� in Chapter 30);
+    /// IA32_RTIT_CTL.TraceEn (see "VMXON-Enter VMX Operation" in Chapter 30);
     /// any attempt to set that bit while in VMX operation (including VMX root
     /// operation) using the WRMSR instruction causes a general-protection
     /// exception.
-- 
1.9.5.msysgit.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
  2016-12-20  1:47 [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters Hao Wu
  2016-12-20  1:48 ` Fan, Jeff
@ 2016-12-20  1:51 ` Kinney, Michael D
  1 sibling, 0 replies; 3+ messages in thread
From: Kinney, Michael D @ 2016-12-20  1:51 UTC (permalink / raw)
  To: Wu, Hao A, edk2-devel@lists.01.org, Kinney, Michael D; +Cc: Fan, Jeff

Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>

Mike

> -----Original Message-----
> From: Wu, Hao A
> Sent: Monday, December 19, 2016 5:48 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Fan, Jeff <jeff.fan@intel.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Subject: [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
> 
> Cc: Jeff Fan <jeff.fan@intel.com>
> Cc: Michael Kinney <michael.d.kinney@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
> b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
> index 633e54d..4f9c103 100644
> --- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
> +++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
> @@ -4014,7 +4014,7 @@ typedef union {
>      /// [Bit 14] If read as 1, Intel(R) Processor Trace (Intel PT) can be used
>      /// in VMX operation. If the processor supports Intel PT but does not allow
>      /// it to be used in VMX operation, execution of VMXON clears
> -    /// IA32_RTIT_CTL.TraceEn (see �VMXON�Enter VMX Operation� in Chapter 30);
> +    /// IA32_RTIT_CTL.TraceEn (see "VMXON-Enter VMX Operation" in Chapter 30);
>      /// any attempt to set that bit while in VMX operation (including VMX root
>      /// operation) using the WRMSR instruction causes a general-protection
>      /// exception.
> --
> 1.9.5.msysgit.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

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