From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5CF7A81BFF for ; Wed, 11 Jan 2017 17:33:21 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP; 11 Jan 2017 17:33:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,347,1477983600"; d="scan'208";a="921551430" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga003.jf.intel.com with ESMTP; 11 Jan 2017 17:33:21 -0800 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 11 Jan 2017 17:33:20 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 11 Jan 2017 17:33:20 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX103.ccr.corp.intel.com ([10.239.4.69]) with mapi id 14.03.0248.002; Thu, 12 Jan 2017 09:33:17 +0800 From: "Fan, Jeff" To: Leo Duran , "edk2-devel@lists.01.org" CC: "brijesh.singh@amd.com" , "Justen, Jordan L" , "Gao, Liming" , "Kinney, Michael D" , "lersek@redhat.com" Thread-Topic: [edk2] [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Thread-Index: AQHSa50mYykIMV8TLE+dBxU7TEqWaKE0Dv9Q Date: Thu, 12 Jan 2017 01:33:16 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C51324D@shsmsx102.ccr.corp.intel.com> References: <1484092554-26224-1-git-send-email-leo.duran@amd.com> <1484092554-26224-2-git-send-email-leo.duran@amd.com> In-Reply-To: <1484092554-26224-2-git-send-email-leo.duran@amd.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDgzYmRhNjctYWQ0NS00OTA3LWIxOTMtMWRkZWRmMDJhNWU4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImdKQWF3NFVuWUF0emQ4UitVZ0FRZjR1NjdMU1Y3K3pUUUl5Q2hLQU53V3M9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jan 2017 01:33:21 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Leo, +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); Buffer should be "IN" instead of "OUT". I understand you just copied origin= al code from UefiCpuPkg. It's better you could update it in your v2 patch serial. Thanks! Jeff -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo = Duran Sent: Wednesday, January 11, 2017 7:56 AM To: edk2-devel@lists.01.org Cc: brijesh.singh@amd.com; Justen, Jordan L; Gao, Liming; Leo Duran; Kinney= , Michael D; lersek@redhat.com; Fan, Jeff Subject: [edk2] [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class)= library The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate i= mplementations of I/O Fifo routines. This patch ports the I/O Fifo routines= into the BaseIoLibIntrinsic library and expand the IoLib class to include = the ported I/O Fifo routines. Cc: Michael D Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++ .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +- MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm | 141 +++++++++++++++ = MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm | 137 ++++++++++++++ MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 +++++++++++++++++= ++ MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 +++++++++++++++++= + MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++++= ++++ MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm | 127 +++++++++++++ MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm | 126 +++++++++++++ 9 files changed, 1256 insertions(+), 1 deletion(-) create mode 100644 Mde= Pkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.= h index a0dd16b..708612e 100644 --- a/MdePkg/Include/Library/IoLib.h +++ b/MdePkg/Include/Library/IoLib.h @@ -2,6 +2,8 @@ Provide services to access I/O Ports and MMIO registers. =20 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made availab= le under the terms and conditions of the BSD License which accompanies thi= s distribution. The full text of the license may be found at @@ -324,6 +32= 6,58 @@ IoBitFieldAndThenOr8 ( ); =20 /** + Reads an 8-bit I/O port fifo into a block of memory. + + Reads the 8-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into an 8-bit I/O port fifo. + + Writes the 8-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** Reads a 16-bit I/O port. =20 Reads the 16-bit I/O port specified by Port. The 16-bit read value is re= turned. @@ -625,6 +679,58 @@ IoBitFieldAndThenOr16 ( ); =20 /** + Reads a 16-bit I/O port fifo into a block of memory. + + Reads the 16-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into a 16-bit I/O port fifo. + + Writes the 16-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** Reads a 32-bit I/O port. =20 Reads the 32-bit I/O port specified by Port. The 32-bit read value is re= turned. @@ -926,6 +1032,58 @@ IoBitFieldAndThenOr32 ( ); =20 /** + Reads a 32-bit I/O port fifo into a block of memory. + + Reads the 32-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into a 32-bit I/O port fifo. + + Writes the 32-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** Reads a 64-bit I/O port. =20 Reads the 64-bit I/O port specified by Port. The 64-bit read value is re= turned. diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/Mde= Pkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf index 29b9e8b..8844b1c 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf @@ -8,6 +8,7 @@ # # Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
= # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made a= vailable under the terms and conditions of the BSD License @@ -16,7 +17,6 @= @ # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,= # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. # -# ## =20 [Defines] @@ -43,12 +43,16 @@ [Sources.IA32] IoLibMsc.c | MSFT IoLibIcc.c | INTEL IoLib.c + Ia32/IoFifo.nasm + Ia32/IoFifo.asm =20 [Sources.X64] IoLibGcc.c | GCC IoLibMsc.c | MSFT IoLibIcc.c | INTEL IoLib.c + X64/IoFifo.nasm + X64/IoFifo.asm =20 [Sources.EBC] IoLibEbc.c diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Lib= rary/BaseIoLibIntrinsic/Ia32/IoFifo.asm new file mode 100644 index 0000000..d490308 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm @@ -0,0 +1,141 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2006 - 2012, Intel Corporation. All rights=20 +reserved.
; Copyright (c) 2017, AMD Incorporated. All rights=20 +reserved.
; ; This program and the accompanying materials are=20 +licensed and made available ; under the terms and conditions of the BSD=20 +License which accompanies this ; distribution. The full text of the=20 +license may be found at ;=20 +http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,=20 +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +; +;---------------------------------------------------------------------- +-------- + + .586P + .model flat,C + .code + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo8 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo8 PROC + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insb + pop edi + ret +IoReadFifo8 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo16 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo16 PROC + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insw + pop edi + ret +IoReadFifo16 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo32 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo32 PROC + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insd + pop edi + ret +IoReadFifo32 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo8 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo8 PROC + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsb + pop esi + ret +IoWriteFifo8 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo16 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo16 PROC + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsw + pop esi + ret +IoWriteFifo16 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo32 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo32 PROC + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsd + pop esi + ret +IoWriteFifo32 ENDP + + END + diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Li= brary/BaseIoLibIntrinsic/Ia32/IoFifo.nasm new file mode 100644 index 0000000..a09e75b --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm @@ -0,0 +1,137 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2006 - 2012, Intel Corporation. All rights=20 +reserved.
; Copyright (c) 2017, AMD Incorporated. All rights=20 +reserved.
; ; This program and the accompanying materials are=20 +licensed and made available ; under the terms and conditions of the BSD=20 +License which accompanies this ; distribution. The full text of the=20 +license may be found at ;=20 +http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,=20 +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +; +;---------------------------------------------------------------------- +-------- + + SECTION .text + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo8 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo8) +ASM_PFX(IoReadFifo8): + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insb + pop edi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo16 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo16) +ASM_PFX(IoReadFifo16): + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insw + pop edi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo32 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo32) +ASM_PFX(IoReadFifo32): + push edi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov edi, [esp + 16] +rep insd + pop edi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo8 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo8) +ASM_PFX(IoWriteFifo8): + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsb + pop esi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo16 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo16) +ASM_PFX(IoWriteFifo16): + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsw + pop esi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo32 ( +; IN UINTN Port, +; IN UINTN Size, +; IN VOID *Buffer +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo32) +ASM_PFX(IoWriteFifo32): + push esi + cld + mov dx, [esp + 8] + mov ecx, [esp + 12] + mov esi, [esp + 16] +rep outsd + pop esi + ret + diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/= BaseIoLibIntrinsic/IoLibArm.c index b9f4c5e..301b215 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c @@ -3,6 +3,8 @@ =20 Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -221,6 +223,186 @@ IoWrite64 ( return 0; } =20 +/** + Reads an 8-bit I/O port fifo into a block of memory. + + Reads the 8-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Writes a block of memory into an 8-bit I/O port fifo. + + Writes the 8-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Reads a 16-bit I/O port fifo into a block of memory. + + Reads the 16-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Writes a block of memory into a 16-bit I/O port fifo. + + Writes the 16-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Reads a 32-bit I/O port fifo into a block of memory. + + Reads the 32-bit I/O fifo port specified by Port. + + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are + + serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + + Writes a block of memory into a 32-bit I/O port fifo. + + Writes the 32-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is + + retrieved from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + + +**/ +VOID +EFIAPI +IoWriteFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} =20 /** Reads an 8-bit MMIO register. diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/= BaseIoLibIntrinsic/IoLibEbc.c index e12a5ae..5bc539b 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c @@ -4,6 +4,8 @@ EBC does not support port I/O. All APIs in this file ASSERT(). =20 Copyright (c) 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -169,3 +171,180 @@ IoWrite32 ( ASSERT (FALSE); return 0; } + +/** + Reads an 8-bit I/O port fifo into a block of memory. + + Reads the 8-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Writes a block of memory into an 8-bit I/O port fifo. + + Writes the 8-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Reads a 16-bit I/O port fifo into a block of memory. + + Reads the 16-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Writes a block of memory into a 16-bit I/O port fifo. + + Writes the 16-bit I/O fifo port specified by Port. + + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are + + serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} +/** + Reads a 32-bit I/O port fifo into a block of memory. + + Reads the 32-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + +/** + Writes a block of memory into a 32-bit I/O port fifo. + + Writes the 32-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + ASSERT (FALSE); +} + diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/= BaseIoLibIntrinsic/IoLibIpf.c index 6b0bf6a..a2e183c 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c @@ -2,6 +2,8 @@ Common I/O Library routines. =20 Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -147,6 +149,7 @@ IoRead64 ( return 0; } =20 + /** Writes an 8-bit I/O port. =20 @@ -252,6 +255,204 @@ IoWrite64 ( } =20 /** + Reads an 8-bit I/O port fifo into a block of memory. + + Reads the 8-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT8 *Buffer8 =3D (UINT8 *)Buffer; + + while (Count--) { + *Buffer8++ =3D IoRead8 (Port); + } +} + +/** + Reads a 16-bit I/O port fifo into a block of memory. + + Reads the 16-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT16 *Buffer16 =3D (UINT16 *)Buffer; + + while (Count--) { + *Buffer16++ =3D IoRead16 (Port); + } +} + +/** + Reads a 32-bit I/O port fifo into a block of memory. + + Reads the 32-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is stored in the=20 + provided Buffer. + + This function must guarantee that all I/O read and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT32 *Buffer32 =3D (UINT32 *)Buffer; + + while (Count--) { + *Buffer32++ =3D IoRead32 (Port); + } +} + +/** + Writes a block of memory into an 8-bit I/O port fifo. + + Writes the 8-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT8 *Buffer8 =3D (UINT8 *)Buffer; + + while (Count--) { + IoWrite8 (Port, *Buffer8++); + } +} + +/** + Writes a block of memory into a 16-bit I/O port fifo. + + Writes the 16-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT16 *Buffer16 =3D (UINT16 *)Buffer; + + while (Count--) { + IoWrite16 (Port, *Buffer16++); + } +} + +/** + Writes a block of memory into a 32-bit I/O port fifo. + + Writes the 32-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is retrieved=20 + from the provided Buffer. + + This function must guarantee that all I/O write and write operations=20 + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ) +{ + UINT32 *Buffer32 =3D (UINT32 *)Buffer; + + while (Count--) { + IoWrite32 (Port, *Buffer32++); + } +} + +/** Reads an 8-bit MMIO register. =20 Reads the 8-bit MMIO register specified by Address. The 8-bit read value= is diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/= Library/BaseIoLibIntrinsic/X64/IoFifo.asm new file mode 100644 index 0000000..71ce6e8 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm @@ -0,0 +1,127 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2006 - 2012, Intel Corporation. All rights=20 +reserved.
; Copyright (c) 2017, AMD Incorporated. All rights=20 +reserved.
; ; This program and the accompanying materials are=20 +licensed and made available ; under the terms and conditions of the BSD=20 +License which accompanies this ; distribution. The full text of the=20 +license may be found at ;=20 +http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,=20 +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +; +;---------------------------------------------------------------------- +-------- + + .code + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo8 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo8 PROC + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insb + mov rdi, r8 ; restore rdi + ret +IoReadFifo8 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo16 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo16 PROC + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insw + mov rdi, r8 ; restore rdi + ret +IoReadFifo16 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo32 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoReadFifo32 PROC + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insd + mov rdi, r8 ; restore rdi + ret +IoReadFifo32 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo8 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo8 PROC + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsb + mov rsi, r8 ; restore rsi + ret +IoWriteFifo8 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo16 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo16 PROC + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsw + mov rsi, r8 ; restore rsi + ret +IoWriteFifo16 ENDP + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo32 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +IoWriteFifo32 PROC + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsd + mov rsi, r8 ; restore rsi + ret +IoWriteFifo32 ENDP + + END + diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Lib= rary/BaseIoLibIntrinsic/X64/IoFifo.nasm new file mode 100644 index 0000000..7ca2ba3 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm @@ -0,0 +1,126 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2006 - 2012, Intel Corporation. All rights=20 +reserved.
; Copyright (c) 2017, AMD Incorporated. All rights=20 +reserved.
; ; This program and the accompanying materials are=20 +licensed and made available ; under the terms and conditions of the BSD=20 +License which accompanies this ; distribution. The full text of the=20 +license may be found at ;=20 +http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,=20 +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +; +;---------------------------------------------------------------------- +-------- + + DEFAULT REL + SECTION .text + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo8 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo8) +ASM_PFX(IoReadFifo8): + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insb + mov rdi, r8 ; restore rdi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo16 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo16) +ASM_PFX(IoReadFifo16): + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insw + mov rdi, r8 ; restore rdi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoReadFifo32 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoReadFifo32) +ASM_PFX(IoReadFifo32): + cld + xchg rcx, rdx + xchg rdi, r8 ; rdi: buffer address; r8: save rdi +rep insd + mov rdi, r8 ; restore rdi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo8 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo8) +ASM_PFX(IoWriteFifo8): + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsb + mov rsi, r8 ; restore rsi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo16 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo16) +ASM_PFX(IoWriteFifo16): + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsw + mov rsi, r8 ; restore rsi + ret + +;---------------------------------------------------------------------- +-------- +; VOID +; EFIAPI +; IoWriteFifo32 ( +; IN UINTN Port, // rcx +; IN UINTN Size, // rdx +; IN VOID *Buffer // r8 +; ); +;---------------------------------------------------------------------- +-------- +global ASM_PFX(IoWriteFifo32) +ASM_PFX(IoWriteFifo32): + cld + xchg rcx, rdx + xchg rsi, r8 ; rsi: buffer address; r8: save rsi +rep outsd + mov rsi, r8 ; restore rsi + ret + -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel