From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E1D768217C for ; Mon, 20 Feb 2017 17:33:16 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2017 17:33:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,187,1484035200"; d="scan'208";a="936216954" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 20 Feb 2017 17:33:16 -0800 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 20 Feb 2017 17:33:16 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 20 Feb 2017 17:33:15 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0248.002; Tue, 21 Feb 2017 09:33:12 +0800 From: "Fan, Jeff" To: Laszlo Ersek , "edk2-devel@ml01.01.org" CC: "Kinney, Michael D" , "Tian, Feng" , "Yao, Jiewen" Thread-Topic: [edk2] [PATCH] UefiCpuPkg/CpuDxe: Add Local APIC memory mapped space in gDS Thread-Index: AQHSi1UJvnnIEaI940SWBI2UXwKb3aFxFcWAgAGT8OA= Date: Tue, 21 Feb 2017 01:33:11 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C540B8D@shsmsx102.ccr.corp.intel.com> References: <20170220084005.21924-1-jeff.fan@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzJlMjI3NmUtOWY1OS00YzlkLWE4NDktMDhjODg5NmEyN2NmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IlViNkt2RGc0Uk1kR2Zsamo3UDZUbDZ6ZndSamFoM1VBSWlnaU1CQXo3Rm89In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/CpuDxe: Add Local APIC memory mapped space in gDS X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Feb 2017 01:33:17 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Laszlo, I added my feedback as below. Thanks! -----Original Message----- From: Laszlo Ersek [mailto:lersek@redhat.com]=20 Sent: Monday, February 20, 2017 5:11 PM To: Fan, Jeff; edk2-devel@ml01.01.org Cc: Kinney, Michael D; Tian, Feng; Yao, Jiewen Subject: Re: [edk2] [PATCH] UefiCpuPkg/CpuDxe: Add Local APIC memory mapped= space in gDS Hi Jeff, On 02/20/17 09:40, Jeff Fan wrote: > Local APIC memory mapped space should be added into gDS and be allocated. > Otherwise, UEFI firmware cannot get correct memory map for it. For=20 > example, SMM profile feature needs to get the completed MMIO map to prote= ct them. >=20 > https://bugzilla.tianocore.org/show_bug.cgi?id=3D390 >=20 > Cc: Jiewen Yao > Cc: Feng Tian > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jeff Fan > --- > UefiCpuPkg/CpuDxe/CpuDxe.c | 39=20 > +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) >=20 > diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c=20 > index 9fb6d76..71a08cd 100644 > --- a/UefiCpuPkg/CpuDxe/CpuDxe.c > +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c > @@ -887,6 +887,40 @@ IdleLoopEventCallback ( > CpuSleep (); > } > =20 > +/** > + Add and allocate CPU local APIC memory mapped space.=20 > + > + @param[in]ImageHandle Image handle this driver. > + > +**/ > +VOID > +AddLocalApicMemorySpace ( > + IN EFI_HANDLE ImageHandle > + ) > +{ > + EFI_STATUS Status; > + EFI_PHYSICAL_ADDRESS BaseAddress; > + > + BaseAddress =3D (EFI_PHYSICAL_ADDRESS) GetLocalApicBaseAddress (); =20 > + Status =3D gDS->AddMemorySpace ( > + EfiGcdMemoryTypeMemoryMappedIo,=20 > + BaseAddress, > + SIZE_4KB, > + EFI_MEMORY_UC > + ); > + ASSERT_EFI_ERROR (Status); (1) This would break OVMF: > Loading driver at 0x0007F510000 EntryPoint=3D0x0007F51027B CpuDxe.efi > InstallProtocolInterface: [EfiLoadedImageDevicePathProtocol] 7EE08498 > InstallProtocolInterface: [EfiCpuArchProtocol] 7F522480 > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > Flushing GCD > > ASSERT_EFI_ERROR (Status =3D Access Denied) ASSERT=20 > .../UefiCpuPkg/CpuDxe/CpuDxe.c(891): !EFI_ERROR (Status) The reason for the assertion failure is that we add an uncacheable MMIO res= ource descriptor HOB for the LAPIC range earlier, in OvmfPkg/PlatformPei. W= hen DXE starts up, it initializes the GCD memory space accordingly, hence t= he above addition failure. There was a similar issue in PciHostBridgeDxe: originally it tried to add u= ncacheable MMIO space for the PCI bridges' apertures, unconditionally. The = solution was to check the GCD memory space map, and: - for any existing, overlapping entries, check if their attributes were com= patible with UC, - missing gaps were filled with new additions. Please see commit 6474f1f156ee ("MdeModulePkg/PciHostBridge: Don't assume r= esources are fully NonExistent", 2016-02-25). [Jeff] I agree. Platform Pei could use resource HOB to declare this range. = I may sync the code from 6474f1f156ee to CpuDxe. (2) After the memory space addition, the allocation should be attempted, I = agree. But for that too, if it fails, that shouldn't be a fatal error. [Jeff] Actually, I don't think there is other module(except for Cpu Driver)= allocating such range. If other module does it, we need to think if it doe= s make sense and how to fix it. Thanks Laszlo > + > + Status =3D gDS->AllocateMemorySpace ( > + EfiGcdAllocateAddress, > + EfiGcdMemoryTypeMemoryMappedIo, > + 0, > + SIZE_4KB, > + &BaseAddress, > + ImageHandle, > + NULL > + ); > + ASSERT_EFI_ERROR (Status); > +} > =20 > /** > Initialize the state information for the CPU Architectural Protocol. > @@ -947,6 +981,11 @@ InitializeCpu ( > RefreshGcdMemoryAttributes (); > =20 > // > + // Add and allocate local APIC memory mapped space // =20 > + AddLocalApicMemorySpace (ImageHandle); > + > + // > // Setup a callback for idle events > // > Status =3D gBS->CreateEventEx ( >=20