From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E054F802A6 for ; Thu, 9 Mar 2017 17:02:28 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP; 09 Mar 2017 17:02:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,137,1486454400"; d="scan'208";a="1140284909" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2017 17:02:26 -0800 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 9 Mar 2017 17:02:25 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 9 Mar 2017 17:02:25 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX104.ccr.corp.intel.com ([10.239.4.70]) with mapi id 14.03.0248.002; Fri, 10 Mar 2017 09:02:23 +0800 From: "Fan, Jeff" To: Anthony PERARD , "Yao, Jiewen" CC: "edk2-devel@lists.01.org" , "Kinney, Michael D" Thread-Topic: [edk2] [PATCH V4 1/3] UefiCpuPkg/CpuDxe: Add memory attribute setting. Thread-Index: AQHSjA/Klce7rKZbl06b3uIGLWbuX6GL+Q+AgAFiFIA= Date: Fri, 10 Mar 2017 01:02:22 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C559F60@shsmsx102.ccr.corp.intel.com> References: <1487660229-4820-1-git-send-email-jiewen.yao@intel.com> <1487660229-4820-2-git-send-email-jiewen.yao@intel.com> <20170309115237.GK1760@perard.uk.xensource.com> In-Reply-To: <20170309115237.GK1760@perard.uk.xensource.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjE0MWQxYjktZDExMy00ZDA0LTk4MzMtZTc4MzkwNDhmODZlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6Ik01WHorWFwvalVVS05RRjNiVWtHb2s1dlVcL08zaTYrRU8xaTY2UVB0bmdTND0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V4 1/3] UefiCpuPkg/CpuDxe: Add memory attribute setting. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Mar 2017 01:02:29 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Anthony, MSR 0x1A0 is architectural MSR defined in IA32 SDM. Have you tried AMD real platform? Thanks! Jeff -----Original Message----- From: Anthony PERARD [mailto:anthony.perard@citrix.com]=20 Sent: Thursday, March 09, 2017 7:53 PM To: Yao, Jiewen Cc: edk2-devel@lists.01.org; Kinney, Michael D; Fan, Jeff Subject: Re: [edk2] [PATCH V4 1/3] UefiCpuPkg/CpuDxe: Add memory attribute = setting. On Tue, Feb 21, 2017 at 02:57:07PM +0800, Jiewen Yao wrote: > Add memory attribute setting in CpuArch protocol. > Previous SetMemoryAttributes() API only supports cache attribute setting. >=20 > This patch updated SetMemoryAttributes() API to support memory=20 > attribute setting by updating CPU page table. >=20 > Cc: Jeff Fan > Cc: Michael Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao Hi, This patch doesn't work on AMD (when running OVMF on Xen). With an AMD cpu,= reading MSR 0x1a0 cause a General Protection Fault. > + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); if (RegEax >=20 > + 0x80000000) { > + AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx); > + if ((RegEdx & BIT20) !=3D 0) { > + // XD supported This next read is where the fault is taken. > + if ((AsmReadMsr64 (0x000001A0) & BIT34) =3D=3D 0) { > + // XD enabled > + if ((AsmReadMsr64 (0xC0000080) & BIT11) !=3D 0) { > + // XD activated > + PagingContext->ContextData.Ia32.Attributes |=3D PAGE_TABLE_LIB= _PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED; > + } > + } > + } >>From OVMF output: !!!! X64 Exception Type - 0D(#GP - General Protection) CPU Apic ID - 00000= 000 !!!! RIP - 000000002F323ABE, CS - 0000000000000018, RFLAGS - 0000000000010002 = ExceptionData - 0000000000000000 RAX - 0000000080000001, RCX - 00000000000= 001A0, RDX - 000000002FD3FBFF RBX - 000000002F422CB8, RSP - 000000002F422C= 68, RBP - 000000002EE0AD98 RSI - 000000002F3AF018, RDI - 000000002F3229E4 R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000 R11 - 000000002F422BAD, R12 - 0000000000000000, R13 - 0000000000000000 R14 - 0000000000000000, R15 - 000000002F44A980 DS - 0000000000000008, ES - 0000000000000008, FS - 0000000000000008 GS - 0000000000000008, SS - 0000000000000008 CR0 - 00000000C0010033, CR2 - 0000000000000000, CR3 - 000000002F3C1000 CR4 - 0000000000000668, CR8 - 0000000000000000 DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000 DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400 GDT= R - 00000000FFFFFF80 000000000000001F, LDTR - 0000000000000000 IDTR - 000000002B68DD90 000000000000021F, TR - 0000000000000000 FXSAVE_STATE - 000000002F4228C0 !!!! Find PE image /home/osstest/build.106538.build-amd64/xen/tools/firmwar= e/ovmf-dir-remote/Build/OvmfX64/DEBUG_GCC49/X64/UefiCpuPkg/CpuDxe/CpuDxe/DE= BUG/CpuDxe.dll (ImageBase=3D000000002F321000, EntryPoint=3D000000002F321271= ) !!!! Thanks, -- Anthony PERARD