From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AA31C21CF25DD for ; Wed, 19 Jul 2017 23:01:57 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jul 2017 23:03:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,382,1496127600"; d="scan'208";a="1197503399" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga002.fm.intel.com with ESMTP; 19 Jul 2017 23:03:50 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 19 Jul 2017 23:03:31 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 19 Jul 2017 23:03:31 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.94]) with mapi id 14.03.0319.002; Thu, 20 Jul 2017 14:03:18 +0800 From: "Fan, Jeff" To: "Dong, Eric" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [Patch v2 0/3] Enable PPIN Cpu feature. Thread-Index: AQHS/qhz8hBN4+zhOkO+tCBjfuqD8qJcPasg Date: Thu, 20 Jul 2017 06:03:18 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C62AE8E@shsmsx102.ccr.corp.intel.com> References: <1500260245-5512-1-git-send-email-eric.dong@intel.com> In-Reply-To: <1500260245-5512-1-git-send-email-eric.dong@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTdmOGYwNDMtMzgxOS00ODgzLWExMWYtODdjYWQ2ZTI1ODIxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IlVFT1dwVnFVK3RnT0lMN1BhNU4xUDFQOWZXb1d6NjNkZks0SWdpdkxrbTQ9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch v2 0/3] Enable PPIN Cpu feature. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Jul 2017 06:01:57 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reivewed-by: Jeff Fan -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Eric= Dong Sent: Monday, July 17, 2017 10:57 AM To: edk2-devel@lists.01.org Subject: [edk2] [Patch v2 0/3] Enable PPIN Cpu feature. Enable PPIN Cpu feature. V2 changes: 1.Use the existed register definition in IvybridgeMsr.h Eric Dong (3): UefiCpuPkg RegisterCpuFeaturesLib: Add error handling. UefiCpuPkg: Add feature definition for PPIN. UefiCpuPkg CpuCommonFeaturesLib: Enable Ppin feature. .../Include/Library/RegisterCpuFeaturesLib.h | 1 + .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 55 ++++++++++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 11 ++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 + UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 114 +++++++++++++++++= ++++ .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 9 +- 6 files changed, 190 insertions(+), 1 deletion(-) create mode 100644 Uefi= CpuPkg/Library/CpuCommonFeaturesLib/Ppin.c -- 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel