From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0AB7621AEB0BA for ; Tue, 25 Jul 2017 19:42:46 -0700 (PDT) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2017 19:44:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,413,1496127600"; d="scan'208";a="131933642" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga006.fm.intel.com with ESMTP; 25 Jul 2017 19:44:45 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 25 Jul 2017 19:44:45 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 25 Jul 2017 19:44:45 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.197]) with mapi id 14.03.0319.002; Wed, 26 Jul 2017 10:44:42 +0800 From: "Fan, Jeff" To: =?iso-8859-1?Q?Marvin_H=E4user?= , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] UefiCpuPkg: Add BOOLEAN casts to return statements. Thread-Index: AQHTAgrvfObjc9SQq0S0ubEW1b38wKJlbgVA Date: Wed, 26 Jul 2017 02:44:41 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C62E55C@shsmsx102.ccr.corp.intel.com> References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNWJmMzhmMDctYjE3Yy00ODdiLThlM2QtMWMzNWQ0YTM3YTRmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImVtbFNsenVvbEVnNXorXC8rclwvbjZtMTB3UnJjbldUaXJ4XC9WM0w4Z0JsNEk9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg: Add BOOLEAN casts to return statements. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Jul 2017 02:42:46 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Marvin, Could you tell what VS version you are using? Jeff -----Original Message----- From: Marvin H=E4user [mailto:Marvin.Haeuser@outlook.com]=20 Sent: Friday, July 21, 2017 6:20 PM To: edk2-devel@lists.01.org Cc: Fan, Jeff Subject: [PATCH] UefiCpuPkg: Add BOOLEAN casts to return statements. Old versions of the Visual Studio C compiler return a value of type 'int' f= or comparisons, which is what the C99 standard defines in the sections 6.5.= 8 and 6.5.9. When the result of a comparison is returned, int is implicitel= y casted to BOOLEAN, which is smaller, and hence a warning about a possible= loss of data is generated. This patch adds casts to BOOLEAN where necessar= y to silence these. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser --- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 8 +++= +---- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 8 +++= +---- UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c | 4 ++-= - UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 6 +++= --- UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c | 2 +- UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 2 +- 15 files changed, 24 insertions(+), 24 deletions(-) diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Li= brary/BaseXApicLib/BaseXApicLib.c index 2091e5e2d0dd..55aee6c607f7 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -3,7 +3,7 @@ =20 This local APIC library instance supports xAPIC mode only. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights=20 + reserved.
Copyright (c) 2017, AMD Inc. All rights reserved.
=20 This program and the accompanying materials @@ -49,9 +49,9 @@ StandardSi= gnatureIsAuthenticAMD ( UINT32 RegEdx; =20 AsmCpuid(CPUID_SIGNATURE, NULL, &RegEbx, &RegEcx, &RegEdx); - return (RegEbx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EBX && - RegEcx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_ECX && - RegEdx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EDX); + return (BOOLEAN)(RegEbx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EBX && + RegEcx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_ECX && + RegEdx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EDX); } =20 /** diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/U= efiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index d5d4efaeb408..bfd5acceebfa 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -4,7 +4,7 @@ This local APIC library instance supports x2APIC capable processors which have xAPIC and x2APIC modes. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights=20 + reserved.
Copyright (c) 2017, AMD Inc. All rights reserved.
=20 This program and the accompanying materials @@ -50,9 +50,9 @@ StandardSi= gnatureIsAuthenticAMD ( UINT32 RegEdx; =20 AsmCpuid(CPUID_SIGNATURE, NULL, &RegEbx, &RegEcx, &RegEdx); - return (RegEbx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EBX && - RegEcx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_ECX && - RegEdx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EDX); + return (BOOLEAN)(RegEbx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EBX && + RegEcx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_ECX && + RegEdx =3D=3D CPUID_SIGNATURE_AUTHENTIC_AMD_EDX); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c b/UefiCpuPkg/L= ibrary/CpuCommonFeaturesLib/Aesni.c index 178bfb50abcf..df0f56ab9d82 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c @@ -69,7 +69,7 @@ AesniSupport ( IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel= )) { MsrFeatureConfig =3D (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) Conf= igData; MsrFeatureConfig[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_SANDY_B= RIDGE_FEATURE_CONFIG); - return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI =3D=3D 1); } return FALSE; } diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Lib= rary/CpuCommonFeaturesLib/C1e.c index 47116355a8ff..00ebc5c9a19e 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c @@ -38,7 +38,7 @@ C1eSupport ( IN VOID *ConfigData OPTIONAL ) { - return IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMod= el); + return (BOOLEAN)IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily,=20 + CpuInfo->DisplayModel); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c b/Ue= fiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c index 56e53561e9de..e625b061829f 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c @@ -38,7 +38,7 @@ ClockModulationSupport ( IN VOID *ConfigData OPTIONAL ) { - return (CpuInfo->CpuIdVersionInfoEdx.Bits.ACPI =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEdx.Bits.ACPI =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c b/UefiCpuPkg/Li= brary/CpuCommonFeaturesLib/Eist.c index 2038171a14c3..593a1e1b35b5 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c @@ -38,7 +38,7 @@ EistSupport ( IN VOID *ConfigData OPTIONAL ) { - return (CpuInfo->CpuIdVersionInfoEcx.Bits.EIST =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.EIST =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c b/Uef= iCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c index 921656a1e869..1ba942990113 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c @@ -50,7 +50,7 @@ ExecuteDisableSupport ( } =20 AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32); - return (Edx.Bits.NX !=3D 0); + return (BOOLEAN)(Edx.Bits.NX !=3D 0); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/Uef= iCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c index d28c4ec51a04..fae09d8be711 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c @@ -65,7 +65,7 @@ VmxSupport ( ASSERT (ConfigData !=3D NULL); MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; MsrRegister[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_IA32_FEATURE_C= ONTROL); - return (CpuInfo->CpuIdVersionInfoEcx.Bits.VMX =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.VMX =3D=3D 1); } =20 /** @@ -215,7 +215,7 @@ SmxSupport ( ASSERT (ConfigData !=3D NULL); MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; MsrRegister[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_IA32_FEATURE_C= ONTROL); - return (CpuInfo->CpuIdVersionInfoEcx.Bits.SMX =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.SMX =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c b/U= efiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c index 40cc9d5fe0cf..ee037c35dc5a 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c @@ -41,7 +41,7 @@ LimitCpuidMaxvalSupport ( UINT32 Eax; =20 AsmCpuid (CPUID_SIGNATURE, &Eax, NULL, NULL, NULL); - return (Eax > 3); + return (BOOLEAN)(Eax > 3); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/MachineCheck.c index 72f665d32e36..0e3b3468d7bc 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c @@ -38,7 +38,7 @@ MceSupport ( IN VOID *ConfigData OPTIONAL ) { - return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCE =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEdx.Bits.MCE =3D=3D 1); } =20 /** @@ -105,7 +105,7 @@ McaSupport ( IN VOID *ConfigData OPTIONAL ) { - return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEdx.Bits.MCA =3D=3D 1); } =20 /** @@ -191,7 +191,7 @@ McgCtlSupport ( return FALSE; } McgCap.Uint64 =3D AsmReadMsr64 (MSR_IA32_MCG_CAP); - return (McgCap.Bits.MCG_CTL_P =3D=3D 1); + return (BOOLEAN)(McgCap.Bits.MCG_CTL_P =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c index 1d43bd128afe..67aaf37d4e3d 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c @@ -38,7 +38,7 @@ MonitorMwaitSupport ( IN VOID *ConfigData OPTIONAL ) { - return (CpuInfo->CpuIdVersionInfoEcx.Bits.MONITOR =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.MONITOR =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/PendingBreak.c index 8cafba4f4a87..5df2ef15ddcf 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c @@ -43,7 +43,7 @@ PendingBreakSupport ( IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) || IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMode= l) || IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMode= l)) { - return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEdx.Bits.PBE =3D=3D 1); } return FALSE; } diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c b/UefiCpuPkg/Li= brary/CpuCommonFeaturesLib/Ppin.c index 146c4cfda3f9..438578a83230 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c @@ -53,7 +53,7 @@ PpinSupport ( // Check whether platform support this feature. // PlatformInfo.Uint64 =3D AsmReadMsr64 (MSR_IVY_BRIDGE_PLATFORM_INFO_1); - return (PlatformInfo.Bits.PPIN_CAP !=3D 0); + return (BOOLEAN)(PlatformInfo.Bits.PPIN_CAP !=3D 0); } =20 return FALSE; diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c b/UefiCpuPkg/= Library/CpuCommonFeaturesLib/X2Apic.c index b4a453c3525c..ecaf47a4af00 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c @@ -71,7 +71,7 @@ X2ApicSupport ( // X2ApicEnabled[ProcessorNumber] =3D (GetApicMode () =3D=3D LOCAL_APIC_MOD= E_X2APIC) ? TRUE : FALSE; =20 - return (CpuInfo->CpuIdVersionInfoEcx.Bits.x2APIC =3D=3D 1); + return (BOOLEAN)(CpuInfo->CpuIdVersionInfoEcx.Bits.x2APIC =3D=3D 1); } =20 /** diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesL= ib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c index 338f1a495cf4..c093356ab150 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c @@ -650,7 +650,7 @@ IsCpuFeatureSetInCpuPcd ( if ((Feature >> 3) >=3D CpuBitMaskSize) { return FALSE; } - return ((*(CpuBitMask + (Feature >> 3)) & (1 << (Feature & 0x07))) !=3D = 0); + return (BOOLEAN)((*(CpuBitMask + (Feature >> 3)) & (1 << (Feature &=20 + 0x07))) !=3D 0); } =20 /** -- 2.12.2.windows.2