From: "Fan, Jeff" <jeff.fan@intel.com>
To: "Dong, Eric" <eric.dong@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Ni, Ruiyu" <ruiyu.ni@intel.com>
Subject: Re: [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
Date: Thu, 3 Aug 2017 14:09:01 +0000 [thread overview]
Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C63655C@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <1501573838-10740-3-git-send-email-eric.dong@intel.com>
Eric,
Typo: " Protected Processor Inventory Number" should be " Local machine check exception "
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
Jeff
-----Original Message-----
From: Dong, Eric
Sent: Tuesday, August 01, 2017 3:51 PM
To: edk2-devel@lists.01.org
Cc: Fan, Jeff; Ni, Ruiyu
Subject: [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
.../CpuCommonFeaturesLib/CpuCommonFeatures.h | 56 +++++++++++++-
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 12 +++
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 +
UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 90 ++++++++++++++++++++++
4 files changed, 157 insertions(+), 2 deletions(-) create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
index c03e5ab..67a44c6 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
@@ -866,8 +866,8 @@ FeatureControlGetConfigData (
CPU_FEATURE_GET_CONFIG_DATA was not provided in
RegisterCpuFeature().
- @retval TRUE Enhanced Intel SpeedStep feature is supported.
- @retval FALSE Enhanced Intel SpeedStep feature is not supported.
+ @retval TRUE Protected Processor Inventory Number feature is supported.
+ @retval FALSE Protected Processor Inventory Number feature is not supported.
@note This service could be called by BSP/APs.
**/
@@ -909,4 +909,56 @@ PpinInitialize (
IN BOOLEAN State
);
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ );
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ );
+
#endif
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
index b88b7d1..4c78209 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
@@ -217,6 +217,18 @@ CpuCommonFeaturesLibConstructor (
);
ASSERT_EFI_ERROR (Status);
}
+ if (IsCpuFeatureSupported (CPU_FEATURE_LMCE)) {
+ Status = RegisterCpuFeature (
+ "LMCE",
+ NULL,
+ LmceSupport,
+ LmceInitialize,
+ CPU_FEATURE_LMCE,
+ CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+ CPU_FEATURE_END
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
return RETURN_SUCCESS;
}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 202d560..2cca58e 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -48,6 +48,7 @@
PendingBreak.c
X2Apic.c
Ppin.c
+ Lmce.c
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
new file mode 100644
index 0000000..8f4fa03
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
@@ -0,0 +1,90 @@
+/** @file
+ Local machine check exception feature.
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> This
+ program and the accompanying materials are licensed and made
+ available under the terms and conditions of the BSD License which
+ accompanies this distribution. The full text of the license may be
+ found at http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "CpuCommonFeatures.h"
+
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+ return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0); }
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ )
+{
+ MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
+
+ ASSERT (ConfigData != NULL);
+ MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
+ if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_FEATURE_CONTROL,
+ MSR_IA32_FEATURE_CONTROL_REGISTER,
+ Bits.LmceOn,
+ (State) ? 1 : 0
+ );
+ }
+ return RETURN_SUCCESS;
+}
--
2.7.0.windows.1
next prev parent reply other threads:[~2017-08-03 14:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-01 7:50 [Patch 0/3] Enable LMCE feature Eric Dong
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
2017-08-03 14:12 ` Fan, Jeff
2017-08-01 7:50 ` [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable " Eric Dong
2017-08-03 14:09 ` Fan, Jeff [this message]
2017-08-01 7:50 ` [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP Eric Dong
2017-08-03 14:12 ` Fan, Jeff
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