* [Patch 0/3] Enable LMCE feature
@ 2017-08-01 7:50 Eric Dong
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Eric Dong @ 2017-08-01 7:50 UTC (permalink / raw)
To: edk2-devel
This patch series enable local machine check exception feature and
used it in wait for ap logic.
Eric Dong (3):
UefiCpuPkg: Add definition for LMCE feature.
UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP.
.../Include/Library/RegisterCpuFeaturesLib.h | 1 +
.../CpuCommonFeaturesLib/CpuCommonFeatures.h | 56 +++++++++++++-
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 12 +++
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 +
UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 90 ++++++++++++++++++++++
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 57 +++++++++++++-
6 files changed, 214 insertions(+), 3 deletions(-)
create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
--
2.7.0.windows.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature.
2017-08-01 7:50 [Patch 0/3] Enable LMCE feature Eric Dong
@ 2017-08-01 7:50 ` Eric Dong
2017-08-03 14:12 ` Fan, Jeff
2017-08-01 7:50 ` [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable " Eric Dong
2017-08-01 7:50 ` [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP Eric Dong
2 siblings, 1 reply; 7+ messages in thread
From: Eric Dong @ 2017-08-01 7:50 UTC (permalink / raw)
To: edk2-devel; +Cc: Jeff Fan, Ruiyu Ni
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
index 8ea0609..54153f4 100644
--- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
+++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
@@ -35,6 +35,7 @@
#define CPU_FEATURE_FASTSTRINGS 6
#define CPU_FEATURE_VMX 7
#define CPU_FEATURE_SMX 8
+#define CPU_FEATURE_LMCE 9
#define CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER 10
#define CPU_FEATURE_LIMIT_CPUID_MAX_VAL 11
#define CPU_FEATURE_MCE 12
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
2017-08-01 7:50 [Patch 0/3] Enable LMCE feature Eric Dong
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
@ 2017-08-01 7:50 ` Eric Dong
2017-08-03 14:09 ` Fan, Jeff
2017-08-01 7:50 ` [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP Eric Dong
2 siblings, 1 reply; 7+ messages in thread
From: Eric Dong @ 2017-08-01 7:50 UTC (permalink / raw)
To: edk2-devel; +Cc: Jeff Fan, Ruiyu Ni
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
.../CpuCommonFeaturesLib/CpuCommonFeatures.h | 56 +++++++++++++-
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 12 +++
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 +
UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 90 ++++++++++++++++++++++
4 files changed, 157 insertions(+), 2 deletions(-)
create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
index c03e5ab..67a44c6 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
@@ -866,8 +866,8 @@ FeatureControlGetConfigData (
CPU_FEATURE_GET_CONFIG_DATA was not provided in
RegisterCpuFeature().
- @retval TRUE Enhanced Intel SpeedStep feature is supported.
- @retval FALSE Enhanced Intel SpeedStep feature is not supported.
+ @retval TRUE Protected Processor Inventory Number feature is supported.
+ @retval FALSE Protected Processor Inventory Number feature is not supported.
@note This service could be called by BSP/APs.
**/
@@ -909,4 +909,56 @@ PpinInitialize (
IN BOOLEAN State
);
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ );
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ );
+
#endif
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
index b88b7d1..4c78209 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
@@ -217,6 +217,18 @@ CpuCommonFeaturesLibConstructor (
);
ASSERT_EFI_ERROR (Status);
}
+ if (IsCpuFeatureSupported (CPU_FEATURE_LMCE)) {
+ Status = RegisterCpuFeature (
+ "LMCE",
+ NULL,
+ LmceSupport,
+ LmceInitialize,
+ CPU_FEATURE_LMCE,
+ CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+ CPU_FEATURE_END
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
return RETURN_SUCCESS;
}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 202d560..2cca58e 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -48,6 +48,7 @@
PendingBreak.c
X2Apic.c
Ppin.c
+ Lmce.c
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
new file mode 100644
index 0000000..8f4fa03
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
@@ -0,0 +1,90 @@
+/** @file
+ Local machine check exception feature.
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "CpuCommonFeatures.h"
+
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+ return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0);
+}
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ )
+{
+ MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
+
+ ASSERT (ConfigData != NULL);
+ MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
+ if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_FEATURE_CONTROL,
+ MSR_IA32_FEATURE_CONTROL_REGISTER,
+ Bits.LmceOn,
+ (State) ? 1 : 0
+ );
+ }
+ return RETURN_SUCCESS;
+}
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP.
2017-08-01 7:50 [Patch 0/3] Enable LMCE feature Eric Dong
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
2017-08-01 7:50 ` [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable " Eric Dong
@ 2017-08-01 7:50 ` Eric Dong
2017-08-03 14:12 ` Fan, Jeff
2 siblings, 1 reply; 7+ messages in thread
From: Eric Dong @ 2017-08-01 7:50 UTC (permalink / raw)
To: edk2-devel; +Cc: Jeff Fan, Ruiyu Ni
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 57 ++++++++++++++++++++++++++++++++++-
1 file changed, 56 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 4ac5e8e..6b66c49 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -196,6 +196,56 @@ AllCpusInSmmWithExceptions (
return TRUE;
}
+/**
+ Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL
+
+ @retval TRUE Os enable lmce.
+ @retval FALSE Os not enable lmce.
+
+**/
+BOOLEAN
+IsLmceOsEnabled (
+ VOID
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+ MSR_IA32_FEATURE_CONTROL_REGISTER FeatureCtrl;
+ MSR_IA32_MCG_EXT_CTL_REGISTER McgExtCtrl;
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+ if (McgCap.Bits.MCG_LMCE_P == 0) {
+ return FALSE;
+ }
+
+ FeatureCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
+ if (FeatureCtrl.Bits.LmceOn == 0) {
+ return FALSE;
+ }
+
+ McgExtCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_EXT_CTL);
+ return (BOOLEAN) (McgExtCtrl.Bits.LMCE_EN == 1);
+}
+
+/**
+ Return if Local machine check exception signaled.
+
+ Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was
+ delivered to only the logical processor.
+
+ @retval TRUE LMCE was signaled.
+ @retval FALSE LMCE was not signaled.
+
+**/
+BOOLEAN
+IsLmceSignaled (
+ VOID
+ )
+{
+ MSR_IA32_MCG_STATUS_REGISTER McgStatus;
+
+ McgStatus.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_STATUS);
+ return (BOOLEAN) (McgStatus.Bits.LMCE_S == 1);
+}
/**
Given timeout constraint, wait for all APs to arrive, and insure when this function returns, no AP will execute normal mode code before
@@ -209,9 +259,14 @@ SmmWaitForApArrival (
{
UINT64 Timer;
UINTN Index;
+ BOOLEAN LmceEn;
+ BOOLEAN LmceSignal;
ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
+ LmceEn = IsLmceOsEnabled ();
+ LmceSignal = IsLmceSignaled();
+
//
// Platform implementor should choose a timeout value appropriately:
// - The timeout value should balance the SMM time constrains and the likelihood that delayed CPUs are excluded in the SMM run. Note
@@ -227,7 +282,7 @@ SmmWaitForApArrival (
// Sync with APs 1st timeout
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer) &&
+ !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal) &&
!AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
) {
CpuPause ();
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
2017-08-01 7:50 ` [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable " Eric Dong
@ 2017-08-03 14:09 ` Fan, Jeff
0 siblings, 0 replies; 7+ messages in thread
From: Fan, Jeff @ 2017-08-03 14:09 UTC (permalink / raw)
To: Dong, Eric, edk2-devel@lists.01.org; +Cc: Ni, Ruiyu
Eric,
Typo: " Protected Processor Inventory Number" should be " Local machine check exception "
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
Jeff
-----Original Message-----
From: Dong, Eric
Sent: Tuesday, August 01, 2017 3:51 PM
To: edk2-devel@lists.01.org
Cc: Fan, Jeff; Ni, Ruiyu
Subject: [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
.../CpuCommonFeaturesLib/CpuCommonFeatures.h | 56 +++++++++++++-
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 12 +++
.../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 +
UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 90 ++++++++++++++++++++++
4 files changed, 157 insertions(+), 2 deletions(-) create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
index c03e5ab..67a44c6 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
@@ -866,8 +866,8 @@ FeatureControlGetConfigData (
CPU_FEATURE_GET_CONFIG_DATA was not provided in
RegisterCpuFeature().
- @retval TRUE Enhanced Intel SpeedStep feature is supported.
- @retval FALSE Enhanced Intel SpeedStep feature is not supported.
+ @retval TRUE Protected Processor Inventory Number feature is supported.
+ @retval FALSE Protected Processor Inventory Number feature is not supported.
@note This service could be called by BSP/APs.
**/
@@ -909,4 +909,56 @@ PpinInitialize (
IN BOOLEAN State
);
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ );
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ );
+
#endif
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
index b88b7d1..4c78209 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
@@ -217,6 +217,18 @@ CpuCommonFeaturesLibConstructor (
);
ASSERT_EFI_ERROR (Status);
}
+ if (IsCpuFeatureSupported (CPU_FEATURE_LMCE)) {
+ Status = RegisterCpuFeature (
+ "LMCE",
+ NULL,
+ LmceSupport,
+ LmceInitialize,
+ CPU_FEATURE_LMCE,
+ CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+ CPU_FEATURE_END
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
return RETURN_SUCCESS;
}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 202d560..2cca58e 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -48,6 +48,7 @@
PendingBreak.c
X2Apic.c
Ppin.c
+ Lmce.c
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
new file mode 100644
index 0000000..8f4fa03
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c
@@ -0,0 +1,90 @@
+/** @file
+ Local machine check exception feature.
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> This
+ program and the accompanying materials are licensed and made
+ available under the terms and conditions of the BSD License which
+ accompanies this distribution. The full text of the license may be
+ found at http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "CpuCommonFeatures.h"
+
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+ return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0); }
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Protected Processor Inventory
+ Number feature must be enabled.
+ If FALSE, then the Protected Processor Inventory
+ Number feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ )
+{
+ MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
+
+ ASSERT (ConfigData != NULL);
+ MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
+ if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_FEATURE_CONTROL,
+ MSR_IA32_FEATURE_CONTROL_REGISTER,
+ Bits.LmceOn,
+ (State) ? 1 : 0
+ );
+ }
+ return RETURN_SUCCESS;
+}
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP.
2017-08-01 7:50 ` [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP Eric Dong
@ 2017-08-03 14:12 ` Fan, Jeff
0 siblings, 0 replies; 7+ messages in thread
From: Fan, Jeff @ 2017-08-03 14:12 UTC (permalink / raw)
To: Dong, Eric, edk2-devel@lists.01.org; +Cc: Ni, Ruiyu
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Dong, Eric
Sent: Tuesday, August 01, 2017 3:51 PM
To: edk2-devel@lists.01.org
Cc: Fan, Jeff; Ni, Ruiyu
Subject: [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 57 ++++++++++++++++++++++++++++++++++-
1 file changed, 56 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 4ac5e8e..6b66c49 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -196,6 +196,56 @@ AllCpusInSmmWithExceptions (
return TRUE;
}
+/**
+ Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL
+
+ @retval TRUE Os enable lmce.
+ @retval FALSE Os not enable lmce.
+
+**/
+BOOLEAN
+IsLmceOsEnabled (
+ VOID
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+ MSR_IA32_FEATURE_CONTROL_REGISTER FeatureCtrl;
+ MSR_IA32_MCG_EXT_CTL_REGISTER McgExtCtrl;
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP); if
+ (McgCap.Bits.MCG_LMCE_P == 0) {
+ return FALSE;
+ }
+
+ FeatureCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL); if
+ (FeatureCtrl.Bits.LmceOn == 0) {
+ return FALSE;
+ }
+
+ McgExtCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_EXT_CTL);
+ return (BOOLEAN) (McgExtCtrl.Bits.LMCE_EN == 1); }
+
+/**
+ Return if Local machine check exception signaled.
+
+ Indicates (when set) that a local machine check exception was
+ generated. This indicates that the current machine-check event was delivered to only the logical processor.
+
+ @retval TRUE LMCE was signaled.
+ @retval FALSE LMCE was not signaled.
+
+**/
+BOOLEAN
+IsLmceSignaled (
+ VOID
+ )
+{
+ MSR_IA32_MCG_STATUS_REGISTER McgStatus;
+
+ McgStatus.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_STATUS);
+ return (BOOLEAN) (McgStatus.Bits.LMCE_S == 1); }
/**
Given timeout constraint, wait for all APs to arrive, and insure when this function returns, no AP will execute normal mode code before @@ -209,9 +259,14 @@ SmmWaitForApArrival ( {
UINT64 Timer;
UINTN Index;
+ BOOLEAN LmceEn;
+ BOOLEAN LmceSignal;
ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
+ LmceEn = IsLmceOsEnabled ();
+ LmceSignal = IsLmceSignaled();
+
//
// Platform implementor should choose a timeout value appropriately:
// - The timeout value should balance the SMM time constrains and the likelihood that delayed CPUs are excluded in the SMM run. Note @@ -227,7 +282,7 @@ SmmWaitForApArrival (
// Sync with APs 1st timeout
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer) &&
+ !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal) &&
!AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
) {
CpuPause ();
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature.
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
@ 2017-08-03 14:12 ` Fan, Jeff
0 siblings, 0 replies; 7+ messages in thread
From: Fan, Jeff @ 2017-08-03 14:12 UTC (permalink / raw)
To: Dong, Eric, edk2-devel@lists.01.org; +Cc: Ni, Ruiyu
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Dong, Eric
Sent: Tuesday, August 01, 2017 3:51 PM
To: edk2-devel@lists.01.org
Cc: Fan, Jeff; Ni, Ruiyu
Subject: [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
index 8ea0609..54153f4 100644
--- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
+++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
@@ -35,6 +35,7 @@
#define CPU_FEATURE_FASTSTRINGS 6
#define CPU_FEATURE_VMX 7
#define CPU_FEATURE_SMX 8
+#define CPU_FEATURE_LMCE 9
#define CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER 10
#define CPU_FEATURE_LIMIT_CPUID_MAX_VAL 11
#define CPU_FEATURE_MCE 12
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-08-03 14:10 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-01 7:50 [Patch 0/3] Enable LMCE feature Eric Dong
2017-08-01 7:50 ` [Patch 1/3] UefiCpuPkg: Add definition for " Eric Dong
2017-08-03 14:12 ` Fan, Jeff
2017-08-01 7:50 ` [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable " Eric Dong
2017-08-03 14:09 ` Fan, Jeff
2017-08-01 7:50 ` [Patch 3/3] UefiCpuPkg PiSmmCpuDxeSmm: Check LMCE capability when wait for AP Eric Dong
2017-08-03 14:12 ` Fan, Jeff
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