From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BFB4921AEB0B9 for ; Thu, 3 Aug 2017 07:10:02 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Aug 2017 07:12:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,316,1498546800"; d="scan'208";a="886010369" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by FMSMGA003.fm.intel.com with ESMTP; 03 Aug 2017 07:12:14 -0700 Received: from fmsmsx125.amr.corp.intel.com (10.18.125.40) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 3 Aug 2017 07:12:14 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX125.amr.corp.intel.com (10.18.125.40) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 3 Aug 2017 07:12:13 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.122]) with mapi id 14.03.0319.002; Thu, 3 Aug 2017 22:12:12 +0800 From: "Fan, Jeff" To: "Dong, Eric" , "edk2-devel@lists.01.org" CC: "Ni, Ruiyu" Thread-Topic: [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature. Thread-Index: AQHTCprxTZtthNXxe0qWQsvZENJUsaJyr8Vw Date: Thu, 3 Aug 2017 14:12:11 +0000 Message-ID: <542CF652F8836A4AB8DBFAAD40ED192A4C6365AE@shsmsx102.ccr.corp.intel.com> References: <1501573838-10740-1-git-send-email-eric.dong@intel.com> <1501573838-10740-2-git-send-email-eric.dong@intel.com> In-Reply-To: <1501573838-10740-2-git-send-email-eric.dong@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNTFjZWVkNjgtNWI3MS00NzQ2LThjNjgtMjhjMzhjYTg0ZGE5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Ik03V2dkRG05SEhxS1NaS2Z3YWwzMjRDNlBhZEY4OG9ZMHRpNkpsZHp5TTQ9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Aug 2017 14:10:03 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jeff Fan -----Original Message----- From: Dong, Eric=20 Sent: Tuesday, August 01, 2017 3:51 PM To: edk2-devel@lists.01.org Cc: Fan, Jeff; Ni, Ruiyu Subject: [Patch 1/3] UefiCpuPkg: Add definition for LMCE feature. Cc: Jeff Fan Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong --- UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 1 + 1 file changed, 1 insertion(+) diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuP= kg/Include/Library/RegisterCpuFeaturesLib.h index 8ea0609..54153f4 100644 --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h @@ -35,6 +35,7 @@ #define CPU_FEATURE_FASTSTRINGS 6 #define CPU_FEATURE_VMX 7 #define CPU_FEATURE_SMX 8 +#define CPU_FEATURE_LMCE 9 #define CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER 10 #define CPU_FEATURE_LIMIT_CPUID_MAX_VAL 11 #define CPU_FEATURE_MCE 12 --=20 2.7.0.windows.1