From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web12.805.1582679353643851589 for ; Tue, 25 Feb 2020 17:09:13 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: liming.gao@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Feb 2020 17:09:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,486,1574150400"; d="scan'208";a="226544608" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga007.jf.intel.com with ESMTP; 25 Feb 2020 17:09:12 -0800 Received: from shsmsx603.ccr.corp.intel.com (10.109.6.143) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 25 Feb 2020 17:09:12 -0800 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by SHSMSX603.ccr.corp.intel.com (10.109.6.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 26 Feb 2020 09:09:10 +0800 Received: from shsmsx606.ccr.corp.intel.com ([10.109.6.216]) by SHSMSX606.ccr.corp.intel.com ([10.109.6.216]) with mapi id 15.01.1713.004; Wed, 26 Feb 2020 09:09:10 +0800 From: "Liming Gao" To: "devel@edk2.groups.io" , "Fu, Siyuan" CC: "Ni, Ray" , "Chaganty, Rangasai V" Subject: Re: [edk2-devel] [Patch] IntelSiliconPkg: Declare zero array explicitly to avoid compiler error. Thread-Topic: [edk2-devel] [Patch] IntelSiliconPkg: Declare zero array explicitly to avoid compiler error. Thread-Index: AQHV7EEyV+mi7oalUkuPVrFy2wIR9qgsqiXQ Date: Wed, 26 Feb 2020 01:09:10 +0000 Message-ID: <54fc92663e744507a2d0db311778b754@intel.com> References: <20200226010753.44716-1-siyuan.fu@intel.com> In-Reply-To: <20200226010753.44716-1-siyuan.fu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.2.0.6 dlp-product: dlpe-windows dlp-reaction: no-action x-originating-ip: [10.239.127.36] MIME-Version: 1.0 Return-Path: liming.gao@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Siyuan, F= u > Sent: Wednesday, February 26, 2020 9:08 AM > To: devel@edk2.groups.io > Cc: Ni, Ray ; Chaganty, Rangasai V > Subject: [edk2-devel] [Patch] IntelSiliconPkg: Declare zero array explic= itly to avoid compiler error. >=20 > This patch fixes a potential compiler error introduced by commit > b0099a39bd since not all compiler can support empty array member. >=20 > BZ: https://tianocore.acgmultimedia.com/show_bug.cgi?id=3D2449 > Cc: Ray Ni > Cc: Rangasai V Chaganty > Signed-off-by: Siyuan Fu > --- > .../Intel/IntelSiliconPkg/Include/Guid/MicrocodeShadowInfoHob.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeShadowI= nfoHob.h > b/Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeShadowInfoHob.h > index d1a9d79a51..d887b39123 100644 > --- a/Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeShadowInfoHob.= h > +++ b/Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeShadowInfoHob.= h > @@ -33,7 +33,7 @@ typedef struct { > // An array with MicrocodeCount elements that stores > // the shadowed microcode patch address in memory. > // > - UINT64 MicrocodeAddrInMemory[]; > + UINT64 MicrocodeAddrInMemory[0]; > // > // A buffer which contains details about the storage information > // specific to StorageType. > -- > 2.19.1.windows.1 >=20 >=20 >=20