From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=binx.song@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 657DD22198F4C for ; Thu, 21 Dec 2017 03:52:15 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Dec 2017 03:57:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,435,1508828400"; d="scan'208";a="160693028" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga004.jf.intel.com with ESMTP; 21 Dec 2017 03:57:03 -0800 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Dec 2017 03:57:03 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Dec 2017 03:57:02 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.159]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.218]) with mapi id 14.03.0319.002; Thu, 21 Dec 2017 19:57:01 +0800 From: "Song, BinX" To: "Kinney, Michael D" , "edk2-devel@lists.01.org" CC: "Dong, Eric" , "lersek@redhat.com" , "Ni, Ruiyu" Thread-Topic: [PATCH V2] UefiCpuPkg: Keep library class header file definition independent Thread-Index: AdN3wigofs9MnqffToa0lNS10cOMdwAkMbYQAH+u6cA= Date: Thu, 21 Dec 2017 11:57:00 +0000 Message-ID: <559D2DF22BC9A3468B4FA1AA547F0EF1025C73B9@SHSMSX101.ccr.corp.intel.com> References: <559D2DF22BC9A3468B4FA1AA547F0EF1025C2B93@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V2] UefiCpuPkg: Keep library class header file definition independent X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Dec 2017 11:52:15 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Mike, Thanks for your suggestion. After discussion with Eric, I know there is a function named IsCpuFeatureSu= pported() to do the feature valid/invalid check. User should do IsCpuFeatureSupported() check first and then RegisterCpuFeat= ure(). So there is no need to add any code to do the same work, I will roll back t= he patch which has been checked in before. Best Regards, Bell Song > -----Original Message----- > From: Kinney, Michael D > Sent: Tuesday, December 19, 2017 7:21 AM > To: Song, BinX ; edk2-devel@lists.01.org; Kinney, > Michael D > Cc: Dong, Eric ; lersek@redhat.com; Ni, Ruiyu > > Subject: RE: [PATCH V2] UefiCpuPkg: Keep library class header file defini= tion > independent >=20 > This still does not work because a library instance that > registers a new CPU feature may want to use a new feature > bit larger than MAX. This change moves the define > from the RegisterCpuFeaturesLib library class to the > implementation of the RegisterCpuFeaturesLibs. >=20 > The components that know the maximum bit number are the > NULL lib instances that register CPU features (e.g. > CpuCommonFeaturesLib) and the platform developer that > that provides the set of NULL lib instances in a platform > DSC file and the associated PCDs. For example, the > following DSC fragment only specifies a single NULL lib > instance that registers CPU features. However, it is > legal to provide additional NULL lib instances from > Si packages. >=20 > UefiCpuPkg/CpuFeatures/CpuFeaturesDxe.inf { > >=20 > NULL|UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib > .inf > } >=20 > The maximum size of the bitmask for CPU features is known > by the size of the PCD called PcdCpuFeaturesSupport that > has a DEC default value based on CpuCommonFeaturesLib but > can be set to a larger size based on the maximum bit used > by all the NULL lib instances. >=20 > So maybe the valid check should just verify that the bit > number passed in is < PcdGetSize (PcdCpuFeaturesSupport) * 8. > This eliminates the use of the #define value and uses an > existing PCD. >=20 > Thanks, >=20 > Mike >=20 > > -----Original Message----- > > From: Song, BinX > > Sent: Sunday, December 17, 2017 9:37 PM > > To: edk2-devel@lists.01.org > > Cc: Dong, Eric ; > > lersek@redhat.com; Ni, Ruiyu ; > > Kinney, Michael D > > Subject: [PATCH V2] UefiCpuPkg: Keep library class > > header file definition independent > > > > V2: > > Move CPU_FEATURE_MAX definition from header file to C > > file. > > V1: > > Keep library class header file definition independent > > > > Cc: Eric Dong > > Cc: Laszlo Ersek > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Bell Song > > --- > > UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > > | 5 ----- > > > > .../Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesL > > ib.c | 11 ++++++----- > > 2 files changed, 6 insertions(+), 10 deletions(-) > > > > diff --git > > a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > > b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > > index fc3ccda..9331e49 100644 > > --- > > a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > > +++ > > b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > > @@ -71,11 +71,6 @@ > > #define CPU_FEATURE_APIC_TPR_UPDATE_MESSAGE > > (32+9) > > #define CPU_FEATURE_ENERGY_PERFORMANCE_BIAS > > (32+10) > > #define CPU_FEATURE_PPIN > > (32+11) > > -// > > -// Currently, CPU_FEATURE_PROC_TRACE is the MAX > > feature we support. > > -// If you define a feature bigger than it, please also > > replace it > > -// in RegisterCpuFeatureLibIsFeatureValid function. > > -// > > #define CPU_FEATURE_PROC_TRACE > > (32+12) > > > > #define CPU_FEATURE_BEFORE_ALL > > BIT27 > > diff --git > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpu > > FeaturesLib.c > > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpu > > FeaturesLib.c > > index 6ec26e1..afc424c 100644 > > --- > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpu > > FeaturesLib.c > > +++ > > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpu > > FeaturesLib.c > > @@ -13,6 +13,10 @@ > > **/ > > > > #include "RegisterCpuFeatures.h" > > +// > > +// Please keep CPU_FEATURE_MAX as the max CPU feature > > +// > > +#define CPU_FEATURE_MAX (32+12) > > > > /** > > Checks if two CPU feature bit masks are equal. > > @@ -97,11 +101,8 @@ RegisterCpuFeatureLibIsFeatureValid > > ( > > > > Data =3D Feature; > > Data &=3D ~(CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER | > > CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL); > > - // > > - // Currently, CPU_FEATURE_PROC_TRACE is the MAX > > feature we support. > > - // If you define a feature bigger than it, please > > replace it at below. > > - // > > - if (Data > CPU_FEATURE_PROC_TRACE) { > > + > > + if (Data > CPU_FEATURE_MAX) { > > DEBUG ((DEBUG_ERROR, "Invalid CPU feature: 0x%x ", > > Feature)); > > return FALSE; > > } > > -- > > 2.10.2.windows.1