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From: Paolo Bonzini <pbonzini@redhat.com>
To: Hao Wu <hao.a.wu@intel.com>, edk2-devel@lists.01.org
Cc: Eric Dong <eric.dong@intel.com>, Star Zeng <star.zeng@intel.com>
Subject: Re: [PATCH 3/6] MdeModulePkg/Tpl: Fix negative value left shift
Date: Tue, 19 Sep 2017 19:02:39 +0200	[thread overview]
Message-ID: <55cbb690-9ae1-56ed-d5a5-e100d9dd98da@redhat.com> (raw)
In-Reply-To: <20170919114351.18448-4-hao.a.wu@intel.com>

On 19/09/2017 13:43, Hao Wu wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=695
> 
> Within function CoreRestoreTpl(), left shift a negative value -2 is used
> in:
> "while (((-2 << NewTpl) & gEventPending) != 0) {"
> 
> which involves undefined behavior.
> 
> According to the C11 spec, Section 6.5.7:
>> 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated
>>   bits are filled with zeros. If E1 has an unsigned type, the value
>>   of the result is E1 * 2^E2 , reduced modulo one more than the
>>   maximum value representable in the result type. If E1 has a signed
>>   type and nonnegative value, and E1 * 2^E2 is representable in the
>>   result type, then that is the resulting value; otherwise, the
>>   behavior is undefined.
> 
> This commit explicitly cast '-2' with UINTN to resolve this issue.
> 
> Cc: Steven Shi <steven.shi@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdeModulePkg/Core/Dxe/Event/Tpl.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Core/Dxe/Event/Tpl.c b/MdeModulePkg/Core/Dxe/Event/Tpl.c
> index 8ad0a33701..8c50f61117 100644
> --- a/MdeModulePkg/Core/Dxe/Event/Tpl.c
> +++ b/MdeModulePkg/Core/Dxe/Event/Tpl.c
> @@ -123,7 +123,7 @@ CoreRestoreTpl (
>    //
>    // Dispatch any pending events
>    //
> -  while (((-2 << NewTpl) & gEventPending) != 0) {
> +  while (((((UINTN)-2) << NewTpl) & gEventPending) != 0) {
>      gEfiCurrentTpl = (UINTN) HighBitSet64 (gEventPending);
>      if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {
>        CoreSetInterruptState (TRUE);
> 

Maybe:

  for (;;) {
    PendingTpl = (UINTN) HighBitSet64 (gEventPending);
    if (NewTpl >= PendingTpl) {
      break;
    }
    gEfiCurrentTpl = PendingTpl;
  }

This is much more readable, and HighBitSet64 should be efficient on most
modern processors.

Paolo


  reply	other threads:[~2017-09-19 16:59 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-19 11:43 [PATCH 0/6] Resolve undefined behaviours in left shift OPs Hao Wu
2017-09-19 11:43 ` [PATCH 1/6] MdePkg/PrintLib: Fix possible negative value left shift Hao Wu
2017-09-19 11:43 ` [PATCH 2/6] MdeModulePkg/PrintLib: " Hao Wu
2017-09-19 11:43 ` [PATCH 3/6] MdeModulePkg/Tpl: Fix " Hao Wu
2017-09-19 17:02   ` Paolo Bonzini [this message]
2017-09-21  2:57     ` Zeng, Star
2017-09-21  3:06       ` Wu, Hao A
2017-09-19 11:43 ` [PATCH 4/6] MdeModulePkg/DxeNetLib: " Hao Wu
2017-09-19 17:04   ` Paolo Bonzini
2017-09-21  5:38   ` Wu, Jiaxin
2017-09-19 11:43 ` [PATCH 5/6] MdeModulePkg/Crc32: Fix possible out of range " Hao Wu
2017-09-19 17:05   ` Paolo Bonzini
2017-09-21  1:30     ` Wu, Hao A
2017-09-19 11:43 ` [PATCH 6/6] MdeModulePkg/AtaAtapiPassThru: " Hao Wu

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